Department of the navy (don) 17. 1 Small Business Innovation Research (sbir) Proposal Submission Instructions introduction

OBJECTIVE: Develop a system to monitor software applications’ memory space for the AEGIS and Ship Self Defense System (SSDS) Combat Systems to determine if a cyber-attack is occurring.

DESCRIPTION: Today’s systems are susceptible to countless types of cyber-attacks. The first step in defending a system from these attacks is the ability to detect them. There are various existing capabilities (for example, Address Space Layout Randomization (ASLR) and Canaries) which are able to prevent and detect specific types of attacks, but one area lacking is an applications memory space. One main reason for this is the difficulty for an external capability to know what is considered a normal application behavior and what is not.

A major component of the combat systems cybersecurity Defense-in-Depth (DiD) strategy is the assurance of system integrity. DiD is an approach to defend systems by implementing multiple capabilities that detect and protect against multiple cyberattacks. One area susceptible to integrity attack is memory space. An application’s memory is one of many areas that can be exploited by a cyber-attack. The ability to monitor the overall integrity of the combat system is necessary to its ability to detect and respond to a cyber-attack. Combat system and computing memory is divided into the operating systems’ kernel memory space and the application’s memory space. There are current capabilities that make memory integrity cyber-attacks more difficult. There is an additional capability that monitors and detects kernel memory integrity violations. No capability exists that passively monitors and detects individual applications memory integrity violations. The combat systems environment is defined as a real-time UNIX operating system with high availability requirements. The ability to monitor the integrity of an applications memory space would provide the combat system the ability to detect memory integrity attacks and respond to them. The innovative technology must have the ability to understand an application’s normal memory space, to detect with minimal false positives when it is exploited via a cyber-attack against it, and to report those detections without impact to running the real-time applications being monitored. Developing this monitoring capability for use within a combat system environment with little or no impact to the combat system will help ensure a more effective cybersecurity DiD strategy. The benefits of this capability will enable surface navy combat systems to field systems that are in a better position to endure a cyber-attack against an applications memory space.

The Phase II effort will likely require secure access, and NAVSEA will process the DD254 to support the contractor for personnel and facility certification for secure access. The Phase I effort will not require access to classified information. If need be, data of the same level of complexity as secured data will be provided to support Phase I work.

PHASE I: The company shall define and develop an approach to monitor software applications’ memory space to implement an open, passive cybersecurity capability that addresses attributes identified in the description section of this topic. The company shall also develop a Plan of Action and Milestones (POA&M) to design, develop, test, and integrate the proposed architecture into combat system environments. Feasibility for the development of the Application Memory Space Integrity Monitor will be determined by the demonstration of the proposed solution’s ability to detect various applications memory cyber-attacks (for example, buffer overflows), its false positive rate and ability to adjust its sensitivity to affect the false positive ratio, and its impact on the application’s ability to perform its primary mission. For the purpose of Phase I, the combat systems environment is defined as a real-time UNIX operating system with a high availability requirement requiring no impact to the running real-time applications being monitored. In the Phase I Option, if awarded, the company will develop a Plan of Action and Milestones (POA&M) to design, develop, test, and integrate the proposed architecture into combat system environments in Phase II. The capabilities of the proposed software will need to be defined.

PHASE II: Based upon the results of Phase I and the Phase II Statement of Work (SOW), a software-based prototype of the application memory integrity monitor will be developed. The prototype must demonstrate the ability to monitor multiple applications memory space using an agreed-to set of application memory cyber-attacks; and to detect and report any integrity violations. This capability should be able to execute with little to no impact to the performance of the monitored applications. The capabilities goal is to have a false positive rate as close to zero as possible and have the ability to adjust its detection sensitivity such that its false positive rate can be adjusted to an acceptable rate based on its environment. The company will provide requirements and architecture documentation, test plans and procedures, and threats to demonstrate that the Application Memory Space Integrity Monitor meets the attributes described in the description section of this document. The company will prepare a Phase III development plan to transition the technology for Navy and potential commercial use.

PHASE III DUAL USE APPLICATIONS: The company will support both PEO IWS 1.0 and 10.0 in the transition of Application Memory Space Integrity Monitoring software and or hardware/software solutions. This will be done by the incorporation and integration of the solutions into the combat systems baseline modernization process. This will consist of integrating the solutions into a combat system baseline hardware/software configuration, working with combat system developers to integrate it into the combat system, and supporting the combat system’s validation testing which will be performed at a Land Base Test Site (LBTS) used to test the combat system. Private Sector Commercial Potential: The ability to define and monitor an application’s memory integrity should be able to support any computing environment. In the commercial sector, just the like in the combat system environment, companies are seeking development of cybersecurity Defense-in-Depth (DiD) strategies to defend their systems against cyber-attacks. These systems consist of various components including networks, operating systems, and applications. There are various types of cyber-attacks that target the memory space used by applications. Just as the combat systems DiD will benefit from the ability to monitor its application memory’s cyber health, so would commercial sector systems.

REFERENCES:

1. Suh, G. Edward; Clarke, Dwaine; Gassend, Blaise; van Dijk, Marten; and Devadas, Srinivas. “Efficient Memory Integrity Verification and Encryption for Secure Processors.” MIT Computer Science and Artificial Intelligence Laboratory. URL last accessed 18

2. Yuh, Hin. “An Efficient Scheme to Provide Real-time Memory Integrity Protection.” May 2009. URL last accessed 18 April 2016. https://www.wpi.edu/Pubs/ETD/Available/etd-043009-183003/unrestricted/YHu.pdf.-

KEYWORDS: Cybersecurity; Applications Memory Space; Kernel Memory Space; Application Memory Integrity; Cyber Integrity Attacks; Buffer Overflow

Questions may also be submitted through DoD SBIR/STTR SITIS website.

TECHNOLOGY AREA(S): Battlespace, Electronics, Sensors

ACQUISITION PROGRAM: Air and Missile Defense Radar (AMDR) Program; AN/SPY-6 Radar

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with section 5.4.c.(8) of the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws.

OBJECTIVE: Develop circulator technology for full integration at the MMIC level, compatible with Gallium Nitride (GaN) technology, for cost reduction and performance enhancement.

DESCRIPTION: Modern radar and electronic warfare (EW) transmitters are based on transmit and receive (T/R) modules as the fundamental building block. At the front end, these T/R modules contain both the radio frequency (RF) solid-state transmitter and receiver circuitry. Microwave circulators are typically used to separate the T/R channels, as well as provide protection to the sensitive receiver circuits during transmission of the high power radar pulse. Conventional microwave circulators are passive, but non-reciprocal, three-port devices that employ a ferrite material in the transmission path and an external permanent magnet to bias the ferrite. The non-reciprocal nature of the device allows signals to propagate freely in the forward direction, but presents a high insertion loss to signals travelling in the reverse direction – hence the ability to separate T/R channels. Circulators can be realized in virtually any transmission line family and are commonly built in waveguide, coax, and planar (especially microstrip and stripline) configurations.

When employed in T/R modules, circulators are typically bought as separate components and carefully mated to the active GaN high power amplifier (HPA) and receiver MMIC(s) during the T/R module assembly process. This not only adds to assembly, it creates junctions between the separate components that inevitably introduce reflection loss into the overall circuit. Matching, differences in substrate (i.e., RF) loss, and differing coefficients of thermal expansion (CTE) complicate design and restrict potential performance enhancements in deference to manufacturing and component compatibility considerations. The circulator itself occupies significant space in the T/R module, which is typically tightly packed. Finally, the circulator-biasing magnet itself, when totaled over many thousands of T/R modules present in a modern radar, contributes to weight and cost. Consequently, the ability to integrate the circulator with the HPA and receiver at the MMIC level would present a major step forward in microwave integrated circuit technology, reducing cost and opening the door to enhanced performance and completely new design possibilities.

Full (chip-level) integration of the circulator function has been proposed in only a couple of realizations. Active circuits that affect the circulator function have been demonstrated. However, active circulators consume power and degrade noise performance. In addition, given a strong enough return signal, active circuits are subject to saturation and potential damage. A quasi-passive approach proposes actively driven ring resonators mimic the magnetic dipoles of a ferrite. Although not employing active circuits directly in the transmission path, the technique still requires additional active elements to drive the ring resonators, takes up considerable space, and exhibits excessive insertion loss as compared to a truly passive circulator. Another proposed technique embeds ferromagnetic “nanowire” in the substrate, forming a magnet-free (self-biasing) and truly passive circulator. Unfortunately, this technique also presents high insertion loss and is difficult to realize in other than easily workable (e.g., organic) substrates. To date, only the purely active circulator technique appears to have been actually integrated at the chip level.

In order to enable future compact, affordable, and higher-performance T/R modules, the Navy seeks a circulator technology for full integration at the MMIC level. Specifically, a technique compatible with RF MMIC fabrication in GaN on silicon carbide (SiC) is desired. Furthermore, a purely passive circulator for S-Band operation and radar application (nominal bandwidth of 1.5 GHz) is desired. The technology may employ additional semiconductor fabrication steps to form the circulator or may make use of follow-on processes (i.e., following the traditional semiconductor device fabrication) such as additive manufacturing techniques that complete the circulator fabrication. However, a process that is compatible with wafer-level semiconductor device fabrication and is consistent with the level of automation common to the integrated circuit industry is required. That is, a solution that requires manual assembly steps (including attachment of biasing magnets) is undesirable. Overall performance of the circulator should be shown to meet or exceed that possible with separate (component-level) circulators on organic or ceramic substrates. Low insertion loss (<0.5 dB objective), high isolation (>25 dB objective), high reliability (assume a 20-year service life), good temperature stability (e.g., a CTE compatible with the GaN MMIC), and high device-to-device repeatability (equaling the repeatability expected of the MMIC) are critical design considerations.

PHASE I: The company will define and develop a concept for circulator technology for full integration at the MMIC level, compatible with Gallium Nitride (GaN) technology, and meeting the technical objectives and consistent with the application stated in the topic description. The company will demonstrate the feasibility of its concept in meeting Navy needs and will establish that the concept can be feasibly and affordably produced. Feasibility will be established by some combination of initial prototype testing, analysis, or modeling. Affordability will be established by analysis of the proposed materials and processes and by comparison to existing and established semiconductor, additive, and automated manufacturing techniques. The Phase I Option, if awarded, will include the initial design specifications and capabilities description to build a prototype in Phase II.

PHASE II: Based on the Phase I results and the Phase II Statement of Work (SOW), the company will produce and deliver prototype circulators consistent with MMIC-level integration for evaluation. It is not necessary that the prototype circulators be actually integrated with other components such as amplifiers and phase shifters. However, it is imperative that the prototypes be built in GaN on SiC semiconductor and proven compatible with other device fabrication. Circulators will be evaluated to determine their capability in meeting Navy requirements and for the level of integration achieved. Evaluation will primarily be accomplished by electrical testing of multiple prototype circulators accompanied by appropriate data analysis and modeling. Affordability will be addressed by refining the affordability analysis performed in Phase I to reflect the knowledge gained in Phase II execution. The affordability analysis will propose best-practice manufacturing methods to prepare the circulator technology for Phase III transition. The company will prepare a Phase III development plan to transition the technology for Navy and potential commercial use.

PHASE III DUAL USE APPLICATIONS: The company will be expected to support the Navy in transitioning the technology to Navy use. The company will further refine the fully integrated MMIC-level circulator technology according to the Phase III development plan for evaluation to determine its effectiveness and reliability in an operationally relevant environment. The company will perform test and validation to certify and qualify initial production components for Navy use. The final product will be produced by the company (or under license) and transitioned to the Government directly through technology upgrades to existing programs (tech refresh) or through insertion into new program baselines in partnership with prime contractors. Private Sector Commercial Potential: MMIC technology is pervasive in consumer as well as military electronics (cellphones and tactical radios are common examples). Advances made in this area have wide application in industries employing MMIC technology.

REFERENCES:

1. Wang, Sen, et al. "Fully Integrated 10-GHz Active Circulator and Quasi-Circulator Using Bridged-T Networks in Standard CMOS.” IEEE Trans. Very Large Scale Integration (VLSI) Systems [to be published, preprint available online] , 2016: 9 pages, URL: ht

2. Kodera, Toshiro, et al. "Magnetless Nonreciprocal Metamaterial (MNM) Technology: Application to Microwave Components.” IEEE Trans. Microwave Theory and Techniques, 61, March 2013: 1030-1042.

3. Saib, Aimad, et al. "An Unbiased Integrated Microstrip Circulator Based on Magnetic Nanowired Substrate.” IEEE Trans. Microwave Theory and Techniques, 53, June 2005: 2043-2049.-

KEYWORDS: MMIC Compatible Circulators; Magnet-Free Circulator; Self-Biasing Circulator; GaN MMIC; Additive Manufacturing for Circulators; Microwave Integrated Circuit

Questions may also be submitted through DoD SBIR/STTR SITIS website.

TECHNOLOGY AREA(S): Battlespace, Electronics, Sensors

ACQUISITION PROGRAM: AN/UYQ-100 Undersea Warfare Decision Support System (USW-DSS)

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with section 5.4.c.(8) of the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws.

OBJECTIVE: Design an innovative and expandable data transportation scheme for the AN/UYQ-100 Undersea Warfare Decision Support System (USW-DSS) that translates bi-directional data exchanges between disparate and diverse data sources into a common language.

DESCRIPTION: An increase of systems in use by the US Navy presents a significant data exchange and collaboration problem within the Fleet. The typical Navy platform infrastructure consists of a combat system such as weapons, command and control, situation awareness, mission planning, and logistics and readiness systems. These systems typically employ their own databases and do not share information with each other. The Navy’s desired paradigm of coordinated mission execution requires an exchange of intra-platform information but also inter-platform information exchange. Successful implementation of this technology would have a significant impact on the AN/UYQ-100 Undersea Warfare Decision Support System (USW-DSS). This technology would simplify USW-DSS external interfaces. An exchange of track data provides an excellent example. Today’s USW-DSS has to account for more than twenty different formats in order to consume track data; however, the core information provided in each individual track is largely similar. This is further complicated by the fact that this data is provided by a multitude of protocols. The Navy requires a capability that will eliminate the need to understand all the source system data formats and protocols by providing a technology with a single, common interface and expandable data transportation scheme.

The latest cloud technologies in the civilian and commercial environments are being integrated into Navy environments. This requires systems to be able to post or submit their data to the cloud for other systems to query and retrieve. Research and development is required to design and propose a methodology and a plan for implementation that will provide existing systems a means to post/submit their information to a data cloud, and convert or translate that information into a uniform and unified data model for fast and efficient storage in and retrieval from the data cloud.

Data from existing systems must also maintain their pedigree, provenance and security restrictions. Fast and efficient, in-line information translation modules are required so that systems retrieving data from the cloud can receive the information in the types and formats typically used by the system. That information should be provided via the physical and logical communications links and protocols that the system normally uses. Technologies such as Amazon Web Services (AWS), Hadoop, Accumulo, ZooKeeper, MapReduce, etc. show promise as potential frameworks, patterns, methods, models and paradigms for use in the solution space.

PHASE I: The company will develop a concept for an innovative and expandable data transportation scheme in a single, common interface to eliminate the need to understand all source system data formats and protocols. Feasibility will be established through testing and analytical modeling that comport with description parameters to meet the needs of USW-DSS data exchange and collaboration environments and result into a useful product for the Navy.

PHASE II: Based on the results of Phase I and the Phase II Statement of Work (SOW), the company will develop and deliver a prototype for an innovative and expandable data transportation scheme for evaluation. The prototype will be evaluated by the Navy in a land-based USW-DSS test environment to determine its capability in meeting the performance goals defined in the Phase II statement of work and the Navy requirements for an innovative data transportation scheme. The system performance will be demonstrated through prototype evaluation and analytical methods for the specified data types. Evaluation results will be used to refine the prototype into an initial design that will meet Navy requirements. The Navy will provide facilities and test environments. Test and evaluation periods will be determined based on the prototype development schedule and program of record test events when practical. Fleet input may be utilized for in-depth evaluation. Secure access to classified data may be required in Phase II. The company will prepare a Phase III development plan to transition the technology for Navy and potential commercial use.

The Phase II effort will likely require secure access, and NAVSEA will process the DD254 to support the contractor for personnel and facility certification for secure access. The Phase I effort will not require access to classified information. If need be, data of the same level of complexity as secured data will be provided to support Phase I work.

PHASE III DUAL USE APPLICATIONS: The company will be expected to support the Navy in transitioning the technology for Navy use. The company will further refine the innovative data transportation and exchange scheme for evaluation to determine its effectiveness in an operationally relevant environment. The company will support the Navy for test and validation to certify and qualify the system for Navy use. The data transportation scheme will be implemented and integrated into a current USW-DSS build under development. Product test, integration and validation will be conducted during the program of record development cycle where appropriate. The company will participate in associated Integrated Product Teams (IPT) such as, but not limited to, development, architecture, test and integration. The company may be expected to engage with the Configuration Control Board. Private Sector Commercial Potential: The potential commercial application of this technology exists in any instance where data is shared between disparate systems. As an example, the medical industry could benefit from this technology. Multiple medical facilities are often required to share data on a patient that is common to all facilities. This technology would provide a framework that would support the exchange of this data with the transformation into the proper format for the receiving facility.