Executive Summary 4
Delta Simulation and Design
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- Navigate this page:
- 4.1.1 Wye Simulation and Design
- 4.2 FPGA Design Hardware
- 4.2.2 FPGA and Switching
- 4.2.3 FPGA and Training Program
- 4.2.5 FPGA Programming Language
- 4.3 Components Comparison
- 4.5 External Power Requirements
- 4.5.1 Internal Power Requirements
- 4.6.2 Programming Instructions
- 4.7 Project FPGA Design
DESIGN4.1 Delta Simulation and DesignThe group plans to test the characteristics of the circuit that we will use in our design, by first designing a schematic of the delta three phase configuration circuit, and simulating the results with a CAD program, preferably MULTISIM. We will power the circuit with 120 Volts in the simulation because the phase converter simulator will draw its power from the AC outlet. The switches will be in particular sequences (all of the switches are in the same directions) which are connected to the potential transformers so that we are able to get the preferred output voltage for the particular phase configuration. In order to effectively use the simulation to represent the real application, we will need to vary the input voltages and observe the output of the circuit because we will use a variable transformer to control the inputted voltage. We expect the simulation results to yield the outcome supportive of our concept of how the circuit will behave in application. Our main interest is in fact that when the switches are in this particular order the output voltage will be the voltage of a delta three phase power leg to ground. 
The below figures represent the simulated outputs of the Delta configurations of single and three phase. Figure 4.3 shows an output of close to 120 volts as a result of phase to ground respectively (with the variable transformer we will be able to adjust the voltage). Figure 4.4 shows an output of 240 volts as a result phase to phase. 
Figure 4.3 
Figure 4.4 4.1.1 Wye Simulation and DesignWe plan to simulate and test the Wye circuit in a similar fashion as the delta amplifier circuit.
The below figures represent the simulated outputs of the Wye configurations of single and three phase. Figure 4.3 shows an output of 120 volts as a result of phase to ground respectively. Figure 4.4 shows an output relatively close to 208 volts as a result phase to phase.
Figure 4.5 
Figure 4.6 4.2 FPGA Design Hardware4.2.1 FPGA and LCDDesigning using the Field Programmable Gate Array is going to be broken down in to multiple parts. First part is the Field Programmable Gate Array needs to control the Liquid Crystal Display screen. Second part is the FPGA needs to control the switching on the output configurations. Third part is the Field Programmable Gate Array needs to control the overall training program. Fourth part the FPGA needs to control the analog to digital converters, basically the inputs coming from the feedback system. Fifth part is what langue to program the FPGA. All of these will use the FPGA to perform their task. To accomplish theses task code needs to be written to the FPGA and also run from the FPGA. The FPGA will have some output devices the main one will be the Liquid Crystal Display screen that will display text to the end-user. From the FPGA point of view what is needed to fully support this LCD screen to get text to be displayed on it. First thing obviously is a LCD screen is needed. Then a connection is needed from the LCD to the FPGA board. This is generally established through connecting the LCD screen to the I/O ports in the FPGA board. Also, a serial enabled LCD backpack can be used. The serial enabled LCD backpack is a device that can be used intermitted between the LCD screen and the FPGA board. According to Sparkfun Electronics the serial enabled LCD backpack has all the HD44780 commands stored in it so using this device with the FPGA will be very easy to use. 4.2.2 FPGA and SwitchingThe FPGA will control the switching for the five-meter cans that will have different outputs coming from. Keep in mind real voltage will be on the output of these meter cans. The first configuration is single-phase output, which will be the simplest of the five having 120/220 volts output to a 2-wire meter can. The second configuration is single-phase output, which will be the second simplest of the five having 120/220 volts output to a 3 wire meter can. The third configuration is a three-phase output, in a delta configuration it will produces a total of 240 volts on all three phases and have a special output for each of phases one the output voltage is 120 volts phase to phase and 208 volts from phase to ground. The fourth configuration is a three-phase output, in a Wye configuration, which will give 120 volts phase to ground and 240 phase to phase. The fifth and final configuration is a three-phase network meter, which has 120/240-volt output. All five of these outputs will be controlled by the FPGA. There will be five switches that will produce the desired voltage in which the FPGA will have complete control over. The FPGA will decide which meter can needs to be turned on the have this voltage. Then it will turn it on and test the voltage to see if the voltage is with in the right range of accuracy around plus minus 5 volts. This self test is very important because if it does not do this and the voltage is off by more than 5 volts the training program will use calculations with in these ranges and it could potentially say the user is measuring the wrong values when the user is actually measuring the correct values. 4.2.3 FPGA and Training ProgramThe FPGA will have the complete training program stored and running from the FPGA. The FPGA will be the tester and the grader of the trainee’s progress. The training program will be detailed in the training program sections. The FPGA will offer the training program with the capability to transmit its instructions to the user through the FPGA then to the FPGA board then through the LCD screen. The training program will receive its input for the analog to digital converters which are connected to the FPGA board I/O ports, but even before that the other end of the analog to digital converters will be connected to a step down transformer. The step down transformer will be connected to two probes for measuring the voltage across the meter lugs in the meter cans. 4.2.4 FPGA and InputsThe analog to digital converters, which connect to the FPGA, will all be coming off of step down transformers because the voltage will be too much for the analog to digital convert. The highest input voltage for an analog to digital converter is right around 10 volts. After stepping down the voltage though the step down transformers it will then be feed into the analog to digital converter, then from the analog to digital converter to the FPGA I/O that will be assigned for that specific input. The reason a specific input was stated was because the ratio that the voltage was stepped down will need to be factored in when the training program checks to see if the desired voltage is within the range of the tested voltage. 4.2.5 FPGA Programming LanguageThe programming language to design all of this will need to be efficient. “FPGAs are programmed using a logic circuit diagram or a source code in a hardware description language (HDL) to specify how the chip will work. FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together"—somewhat like a one-chip programmable breadboard. Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory”[4]. Also, there is third party software that supports programming in C and then it is converted to verilog. Since the programming level of the group is not fully familiarly with any of theses languages apart from C. The logical decision is to select the FPGA in which C code can be written and then transferred to one of the other languages that the FPGA understands. 4.2.6 FPGA IntegrationTying all five parts of the function and or functionality of the FPGA leads to a successful project. Looking at the first part of the FPGA needing to control the LCD screen has some basic parts to it when it comes down to the nuts and bolts of it. But it can also be one of the harder parts of the project due to the integration of an out receiver. Mainly what will the compatibility issue be like with the FPGA? This is where the systems integration is key. It might be at the smallest level, but still is a key part of this project and any other project out there. Systems integration is basically “a person or company that specializes in bringing together component subsystems into a whole and ensuring that those subsystems function together” [5]. The third part is the FPGA needs to control the overall training program. This will be discussed later on in great detail. But, the main idea behind the training program is to properly train a new meter technician to go out in the field with confidence of having practice under their belt so this individual will be less likely to make a major error. This training program will not eliminate error, but instead minimize the occurrence of errors made. That is the thinking behind the training program. The logic and programming will need to be discussed on its own. Approaching the fourth part of having the FPGA controlling the analog to digital converters is not to be taken lightly. Basically the inputs coming from the feedback system can potentially destroy the entire analog to digital converter. In addition, it could also destroy the entire FPGA. The logical ideal is the have a protection circuit just before the FPGA or even before the analog to digital converter. It can be approach in multiple way, the FPGA can have a kill switch it he voltage gets beyond a certain point. Have it control through software having a dedicated I/O for reading the voltage level. Or a simple circuit board with a comparator on it so when the voltage gets to high the analog to digital converter does not even feels it. That last part is what langue to program the FPGA with. The simple answer is to use a common language that is familiar to the group. In programming an FPGA, the programmer has to account for more than the code itself. The memory allocation to store the code and also how much memory is needed to run the code efficiently will be needed so the FPGA can be coded properly. The five parts that where just discussed where a high level outline of what is going on with the FPGA. Basically what will the FPGA be used for and what parts of the project will be using it. 4.3 Components Comparison4.3.1 FPGAThe implementation of the FPGA is key to the success of the project. From observations, research, and the process of elimination the Sparta FPGA has the most advantages and he least disadvantages. The Sparta 3 family was presented earlier in this paper due to the generality of the Sparta FPGA family. The Sparta 3E will be used in this project. The FPGA board the Sparta 3E chip will be used with is the Basys board. The reason for the use of the Sparta 3E FPGA instead of he Sparta 3A is the Sparta 3E has all the speed, functionality, memory, power requirements, and user friendliness. The Sparta 3A is designed for high functionality and high end-users. Some applications of the Sparta 3A are used for are way beyond the needs of what the project requires. It would not be cost effective nor would optimizations be achieved with the use of this FPGA. Also the board that is used with the FPGA is key. The board this like the arms and legs of the FPGA and the Sparta 3E is the brains of the entire device. 4.3.2 BoardThe Basys board is developed by Digilent and has the all requirements needed for the project to work effectively. The Basys board has the correct interface so it will be in sync with the Sparta 3E FPGA. Also the user friendliness is one of the biggest factors in the selection of the FPGA and the FPGA board. The Digilent has developed a great product for the designing of new applications of the engineer in mind. The Digilent offers on of the best online help for the designer in mind. The software part of the FPGA is also very important. The Digilent website offers a applications with the FPGA for programming of the FPGA. The language this FPGA uses is VHDL and Xilinx. Comparing the Basys board with the Xilinx board that comes from the manufacturer the Basys board has the same capabilities as the manufactures board, but at a much cheaper price. The manufactures board is designed for more than is needed for this project and it will not be effective to waste the capabilities of that board. The capabilities of the Basys board meet the requirements of this experiment to an effective level. Basically meaning there will not be any wasted parts of the board. This will save on the power consumption of the entire project by minimizing the number of unused components. The simplicity of the Basys board has been a major factor in the decision to use this type of board as seen in figure 5.a. The board is “built around a Xilinx Spartan-3E Field Programmable Gate Array and a Cypress EZUSB controller, the Basys board provides complete, ready-to-use hardware suitable for hosting circuits ranging from basic logic devices to complex controllers” []. The board has many devices that will aid in the development of this project. The Xilinx Sparta 3E FPGA is powerful and precise. In its processing power and efficiency the Cypress EZUSB controller will help in the programming of the FPGA. The USB is much more compatible rather than another interface like serial. The Basys board has a plug and play style about it as described. One neat expansion factor in is board is called Pmods. “Pmods are inexpensive analog and digital I/O modules that offer A/D & D/A conversion, motor drivers, sensor inputs, and many other features” [6]. This technology has not been seen in other FPGA boards that have been researched. The Pmods are a six pin connections that have a user-friendly expansions devices. 
Figure 5.a Reprinted with permission of Digilent.
4.4 OverviewTo access the board there is a USB connection in which the board can be programmed and settings can be changed. The USB can also power the board so the power supply will not be needed. This makes the ease of use much better because there are no extra cables needed to program the board. The software that is comes with the board is fully compatible and has an auto detect feature designed with it. The “Digilent’s freely available PC-based Adept software automatically detects the Basys board, provides a programming interface for the FPGA and Platform Flash ROM, and allows user data transfers at up to 400Mbytes/sec” [6]. Also if the designer does not prefer the Adept software that comes with the board and all the features it has. The Xilinx ISE software can be used with the Basys board to program it. But what has to be kept in mind is that a JTAG3 cable will be needed with the Xilinx software and also the external power supply. One other major tool that this board has to offer is he ISE WebPack CAD software that is developed by Xilinx. This tool called “WebPack can be used to define circuits using schematics or HDLs, to simulate and synthesize circuits, and to create programming files” [6]. This is the first board that has a nice feature that tells weather it is working properly or not. This has new been heard of from any other FPGA board designer. According to Diligent it stores the self-test program in the ROM and this program comes when the board it shipped already built in. These software packages combined with the board features make this one of the best designer tools out on the market today. 4.5 External Power RequirementsFrom before the board can be power by the USB cable or by the external power supply. One other way the board can be powered is by a battery pack from 4 volts to 9 volts. Each time a power supply is connected the board has a jumper that needs to be configured or the designer could risk damaging the entire board. To use USB power, set the power source switch (SW8) to USB and attach the USB cable. To use an external wall-plug power supply, set SW8 to EXT and attach a 5VDC to 9VDC supply to the center-positive, 2.1/5.5mm power jack. To use battery power, set SW8 to EXT and attach a 4V-9V battery pack to the 2-pin, 100-mil spaced battery connector” [6]. Figure 5.b give a pictorial description of the Basys board. These configurations given from the manufacture need to be followed to the tee or the designer runs the risk of damaging the board. 4.5.1 Internal Power RequirementsThe external power supply was discussed previously now the internal power requirements and descriptions will not be focused on. The “Input power is routed through the power switch (SW8) to the four 6-pin expansion connectors and to a National Semiconductor LP8345 voltage regulator. The LP8345 produces the main 3.3V supply for the board, and it also drives secondary regulators to produce the 2.5V and 1.2V supply voltages required by the FPGA. Total board current is dependant on FPGA configuration, clock frequency, and external connections. In test circuits with roughly 20K gates routed, a 50MHz clock source, and all LEDs illuminated, about 100mA of current is drawn from the 1.2V supply, 50mA from the 2.5V supply, and 50mA from the 3.3V supply. Required current will increase if larger circuits are configured in the FPGA, or if peripheral boards are attached” [6]. 
Figure 5.b Reprinted with permission of Digilent.
4.6 ProgrammingThe Basys board comes completely blank with not pervious programs or files stored on it apart from the self-test file that is stored in the ROM of the FPGA board. The next step to use the FPGA board is to configure it to get what the designer wants out of the board. First the board needs to be powered on. When the board is in the configuration mode “a “bit” file is transferred into memory cells within the FPGA to define the logical functions and circuit interconnects” [6]. Basically all this means is there are some libraries of bit files to help the designer make the whole process of try fail adjust go much more soother. According to the Digilent manufacture bit file can be make in three different source files. The first is VHDL, which means very high-level design language. The second one is Verilog is a HDL which means hardware description language. The last type is schematic based which is exactly as it sounds. What is very helpful to the designer is that all three of these tools are available with ISE/WEB CAD, which comes from Xilinx software tools for not charge. 4.6.1 InterfaceThe interface between the computer GUI and the software part of the FPGA is very important part and Digilent has not left this to any chance. The Basys board uses a program named Adept. What can this program do? According to Digilent the Adept “can be used to configure the FPGA with any suitable bit file stored on the computer”[6]. The Adept program will use the USB as the medium to transfer the program from the computer to the Sparta 3E chip. Looking at figure 5.c there is a section called JTAG Header and Mode jumper. This is the location the where the port for programming is. More specifically this port is called he JTAG port. 
Figure 5.c Reprinted with permission of Digilent.
To actually program the board these instructions are from Digilent. Attach the USB cable to the board so it has a data connection from the computer to the FPGA board. No external power supply is needed for this process. First “Start the Adept software, and wait for the FPGA and the Platform Flash ROM to be recognized. Use the browse function to associate the desired .bit file with the FPGA, and/or the desired .mcs file with the Platform Flash ROM. Right-click on the device to be programmed, and select the “program” function” [6]. Following these instructions to the detail will give the end user success in programming the FPGA with desired program that was created in Adept. Also on the Basys board there is an indicator that the program was sent successfully. A LED will light up to represent the programming process was successfully done right. This LED is called “LD_D” and it can be seen on figure 5.d. 
Figure 5.d Reprinted with permission of Digilent.
In order to design the FPGA for the project there are some requirements that need to be meet by the designer and the equipment. According to Programmable logic design line there are 14 categories that need to be attended to. Looking at figure 6.a it will detail the aspects that will be covered in the project from the begging of just learning how to use the equipment to programming and actually implementing the entire design. The most key thing to this entire processes is the that the designer has to be able to spare enough time to learn, make mistakes, troubleshoot, and see the results. FPGA design checklist:
Figure 6.a Reprinted with permission of Programmable logic design line. Make sure you have plenty of time to spare Firstly, the application and use of the designer’s time for this project is key to the success that will be achieved. The majority of the designing time will be spent of the learning of the capabilities of the FPGA technology and how the strengths of the FPGA will aid the project. It will take some time to set everything up, find all the information scattered all over the place and solve all problems along the way. I started this project December 2006 and I have not finished it yet. Learning from my mistakes will save you some time” [7]. Learning from the experience from someone who has gone before will help in numerous ways. All it means is that the designing of the FPGA for this project will be done in half the time because of the fact the designer will know exactly what to implement and what not to. A pictorial representation can be seen in figure 6.b of the whole process. 
Figure 6.b Reprinted with permission of Programmable logic design line.
After trying out Parallells Desktop and VMware Fusion, I decided to go with VMware Fusion” [7]. Since this factor of the design of this project is not a major factor. The computer that is going to be used will have the Windows environment already installed in it. The design phase of the project will not require the use of a virtual machine, but the revision of the design will be done in a Macintosh environment and will need a virtual machine. Select an FPGA vendor As discussed previously in the research area of this paper three major manufactures of the FPGA were identified and expanded upon. From the process of elimination by the comparison of the benefits and cost of each FPGA the Sparta 3E was chosen. “The two major FPGA vendors are Altera and Xilinx. Choosing which one to use is not an easy decision. The deciding factor for me was the MicroBlaze soft processor from Xilinx” [7]. The cost benefit process was a great guide in decided which FPGA to use, but also there seem to be more information about the Xilinx FPGA. Also, it seems to be a very well known FPGA by designers. The MicroBlaze was an other key factor in the decision of choosing of the FPGA. One other key factor in choosing a vendor is that it would make sense to buy parts from a manufacture that is no longer making replacement or accessories for the FPGA. It will limit the capabilities of future potential. Pick out a suitable development board The FPGA needs a good environment to perform. So if choosing the FPGA is the most important decision the second most important is choosing the development board. There are many options to choosing a board “we could, of course, design an FPGA-based development system for ourselves, but using one of the development boards from Xilinx will make things much easier. Xilinx have a number of such boards in their catalog. Which one to pick? I decided to go for the ML403 board that has a Virtex-4 FPGA with a PowerPC 405 core. A cheaper alternative would be a Spartan 3 based board” [7]. In this project the development board manufacture is Digilent. They offer a board called the Basys board which delivers all the advantages of the other development boards, but with less complexity and at a reduced price. Another advantage to using the Digilent Basys board is that the manufacture combines the Sparta 3E FGPA with the Basys board in one complete package. Select an embedded processor to use The use of the embedded processor in this project will run all the functions in the back ground. Like the allocation of memory, processes, and allocation of component function. “As I mentioned earlier, I have already decided to use the MicroBlaze soft processor core. The MicroBlaze is a 32-bit Harvard RISC architecture optimized for Xilinx FPGAs. The basic architecture consists of 32 general-purpose registers, an Arithmetic Logic Unit (ALU), a shift unit, and two levels of interrupt” [7]. The biggest reason for the use of the MicroBlaze is the optimization factor that is provides that was discussed earlier. This will aid in the use of the LCD display in which delay is not acceptable. Also, when the switching is needed the time it takes to switch on the correct configuration will help with the professionalism. And the feed back system needs to be taken into account from the user side of the project. The embedded processor for our project will ultimately give us optimization. A pictorial representation can be seen in figure 6.c of the MicroBlaze in use and how it plays it role in the grand scheme of things. 
Figure 6.c Reprinted with permission of Programmable logic design line.
Figure 6.d Reprinted with permission of Digilent. This is one of the few tool packages that offer the entire software suit. The Digilent software suit will be used fully in this project. What makes this suit more superior that the Xilinx software suit is the information provided on the use of this software suit. It is user friendly and the optimization will help when it comes to speed of the system. Adding the latest service packs This part of the designing process is mostly overlooked by most people. This type of designing is future thinking on the basis of expansion of the project. “As always with software products there are updates and bug fixes. These are delivered in service packs that have to be downloaded and installed. It is very important to ensure that you have the latest service pack(s) installed, because this will save you a lot of headaches” [7]. This project will use the most up to date software that is provided from the programming software to the development software. As quoted from above it will save lots of problems from happening due to bugs in the manufacturing software. This will aid in the minimization time of designing and troubleshooting. It will eliminate some areas that the designer can look for when problems arises in the software side of the project. Choosing a logic simulator This logic simulator is the part of the software suit that will be used to program the user interface and the training program for the project. The decision on which one will give the most benefit to cost ratio is the real question. “The Xilinx software includes a very simple Verilog and VHDL Simulator that runs only under Windows XP. The commercial simulators available from Cadence, Synopsys, and Mentor cost a fortune and are out of reach for the normal user.” [7]. The three logic simulator manufactures are very closely rated “No.1 and No.2 EDA vendors Cadence and Synopsys are preparing huge pushes into advanced FPGA design this fall, and No.3 player Mentor Graphics has pledged not give an inch in the space it leads, having beat Cadence and Synopsys at this game a few times already” [8]. The price of the use of their software can be very expensive as stated above. Not only is there a licensing fee to use the software, but the time it will take to learn how to use it with the type of syntax. What is pretty neat about the Sparta 3E is that the code is so similar to C that any C compiler can be used and then just sent to the FPGA. So it will help with the whole cost and time issue that was once an issue. Choosing a synthesis tool The first reason to even consider a synthesis tool is to know what a synthesis tool is. The “Synthesis Technology (XST), which synthesizes VHDL, Verilog, or mixed language designs to create Xilinx-specific netlist files known as NGC files. Unlike output from other vendors, which consists of an EDIF file with an associated NCF file, NGC files contain both logical design data and constraints. XST places the NGC file in your project directory and the file is accepted as input to the Translate (NGDBuild) step of the Implement Design process” [9]. Basically it is a tool that is like a translator from one language to another. The next step is to choose which synthesis tool to use “the Xilinx software comes with the XST Synthesis Tool. There are a number of synthesis tool out on the market but I find XST to be sufficient for my needs” [7]. For a basic easy to learn software the XST is the way to go. For the project when data in transmitted back and froth from the FPGA to the analog to digital converter it will most definitely help the process, but also boost efficiency in countless ways. A pictorial description can be seen in figure 6.e. 
Figure 6.e Reprinted with permission of Xilinx.
Learn C-programmingThe designer for this project needs to have an understanding of a computer language to understand the logic behind what is needed to implement the design stands for the projects success. “If you don't have any experience with regard to programming in C, you should find a good textbook and start learning it immediately. Why? Well, apart from being a very useful thing to know in general, all the Xilinx software device drivers are written in C” [7]. The project will have coding in C for all the major parts like the LCD interface, the training program, and the switching. The designer that will code the project has an intermediate understanding of the C programming language. Read my tutorialAccording to Sven Anderson the use of his website will give a very good foundation of knowledge that can be used for future decisions on the design, implementation, and troubleshooting.” For a full description of my embedded design project, read my tutorial, which you will find on my www.fpgafromscratch.com website. Also please note that this is an interactive experience- I welcome you comments, suggestions, and questions, which you can post on my site” [7]. The tutorials that his website provides helps the designer in every aspect of FPGA design from the basic software programming to the allocation and use of the components on the FGPA board. Sven Anderson website has all the information needed for applications that is projects needs. His website provides the basics which then can be combined to produce the desired result. Directory: seniordesign seniordesign -> Hvac control and Feedback System 0 Group 2 Steve Jones Mathew Arcuri Elroy Ashtian, Jr seniordesign -> Group 5 Spr-Sum 2011 seniordesign -> Senior Design II paper seniordesign -> Remote Touchscreen-Controlled Defense Turret Senior Design Documentation Courtney Mann, Brad Clymer, Szu-yu Huang Group 11 seniordesign -> Flight Performance Data Logging System seniordesign -> Amphibious vehicle seniordesign -> T-100 Watch Dog (Autonomous Security Vehicle) seniordesign -> Ehvac: Wireless Modular Multi-Zone hvac controller Group b javier Arias Ryan Kastovich Genaro Moore Michael Trampler seniordesign -> Table of Contents Executive Summary 2 Download 0.5 Mb. Share with your friends:
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