INTERRUPT HANDLING When an interrupt occurs and is recognized by the processor, a sequence of events takes place 1 If the transfer involves a change of privilege level, then the current stack segment register and the current extended stack pointer (ESP) register are pushed onto the stack. 2 The current value of the EFLAGS register is pushed onto the stack. 3 Both the interrupt (IF) and trap (TF) flags are cleared. This disables INTR interrupts and the trap or single-step feature. 4 The current code segment (CS) pointer and the current instruction pointer (IP or EIP) are pushed onto the stack. 5 If the interrupt is accompanied by an error code, then the error code is pushed onto the stack. 6 The interrupt vector contents are fetched and loaded into the CS and IP or EIP registers. Execution continues from the interrupt service routine. REDUCED INSTRUCTION SET COMPUTERS Instruction Execution Characteristics,
