Staff Mobility and Exchanges between teams are essential for integration within and beyond the NoE, including mobility of students and/or researchers, between core teams, or between core teams and affiliated teams.
Mobility should be justified by and refer to involvement in an activity from the JPRA or JPIA, or one of the following: co-funded scholarships with industry; exchange of students and personnel within the consortium.
-- All new text: this entire chapter pertains only to activity in Year 4.--
During the 4th year the collaboration between partners has been intensified, with a high number of joint acitivities and publications involving exchange of staff: We highlight the following collaborative efforts referring to the more detailed description in the activity reports on Modeling and Validation:
Trento, KTH and UC Berkeley collaboration on combining strengths of PtolemyII and Metropolis
Trento and UC Berkeley collaboration on cyber-physical systems and contracts for circuits.
Several partners collaborate on a white-paper on contracts.
IST Austria + VERIMAG onrobust synthesis.
SPEEDS, CESAR, RECOMB, MBAT: several partners participate and collaborate within other FP6 and ARTEMIST projects
INRIA, OFFIS, IST-Austria, TRENTO and Verimag have collaborated intensively on contracts with plans for continuation.
Uppsala is collaborating with Absint, ETH at Zurich, TU Braunschweig, and Verimag on Mixed Criticality Systems (MCS).
Uppsala is collaborating with ETH at Zurich to combine analytic methods with model checking for efficient timing analysis.
The work of Saltzburg on power isolation is part of a recent initiative in rigorous systems engineering (RiSE) with nine partners in Austria including IST Austria.
Uppsala and CISS has continued collaboration on the distribution, maintainance and further dissemination of UPPAAL
CISS and INRIA has collaborated on development compositional specification theories for probabilistic systems as well as the development of statistical model checking for networks of timed automata.
CISS and LSV has collaborated intensely on the development of priced timed automata, energy automata, energy games and robustness for timed automata.
CISS, INRIA and RWTH has collaborated on a specification theory based on abstract probabilistic automata.
CISS and INRIA has collaborated on determinisation of timed automata using games, with the purpose of aid testing as well as statistical model checking
The activites involve more than 25 exchange vistist of more than 1 week duration.
3.2SW Synthesis, Code Generation and Timing Analysis cluster
Visiting researcher: Prof. Reinhard Wilhelm (Saarland University)
Team visited: IRIT, Université Paul Sabatier Grenoble, November 2011,
Purpose: Habilitation of Christine Rochange
Visiting Researcher: Mihail Asavoaie is a PhD student at University Al. I. Cuza of Iași, working with prof. Dorel Lucanu
Mihail visited Reinhard Wilhelm’s group and AbsInt to learn about the Saarland timing-analysis technology and in particular about the derivation of abstract processor models. Mihail cooperates on the K framework.
Visiting researcher:Vitor Rodrigues, University of Porto
Team visited: Compiler Design Lab, Saarland University
Vitor visited Reinhard Wilhelm’s group to complete his functional-programming approach to timing analysis with a low-level analysis.
Visiting researcher: Jan Gustafsson, Mälardalen University Team visited: Peter Puschner’s real-time research group at TU Vienna, Austria
Vienna, Austria Oct. 4, 2011 to Oct. 7, 2011
Approximate cost for travel and lodging: 860 €
Reason for the visit: Discuss connections and cooperation between the flow-analysis research at Mälardalen University and Benedikt Huber’s work with building an open timing analysis platform at TU Vienna. Jan Gustafsson also made a presentation of a current paper, published at RTNS 2011: “Automatic Generation of Timing Models for Timing Analysis of High-Level Code” for Peter Puschner’s group and invited listeners.
Conclusions/objectives reached: Benedikt Huber’s work on an open timing analysis platform was published at the WCET workshop in Porto 2011. His work includes using an open compiler framework (LLVM), flow analysis (using the SWEET tool from Mälardalen University), low-level analysis (using aiT from AbsInt) and a target platform (using LEON3). During the meetings during the visit, Mälardalen University and TU Vienna decided to intensify the cooperation to enhance our methods and tools. Especially, we will together enhance the development the C to ALF translator (developed at TU Vienna) and SWEET (developed at Mälardalen University, with the goal of a fully automatic WCET analysis of C programs. Areas that will be explored are handling of library functions and absolute addresses in C, and the different merging strategies that need to be used in SWEET. We also discussed cooperation in the area of automatic generation of timing models for timing analysis of high-level code, and timing measurement techniques.
Visiting student: Volker Seeker (Technical University of Berlin) Team visited: Compiler and Architecture Design Group, Björn Franke (University of Edinburgh)
Edinburgh, United Kingdom – October 2010 to January 2011 Reason for the visit: Volker Seeker was a student of Computer Science at the Technical University of Berlin. He spent a couple of months at the University of Edinburgh to work on his master thesis. The topic of his thesis is “Design and Implementation of an Efficient Instruction Set Simulator for an Embedded Multi-Core Architecture”. Volker’s thesis has been jointly advised by Björn Franke (Edinburgh) and Sabine Glesner (Berlin). In September 2011, Volker Seeker’s master thesis won the SET (Science, Engineering and Technology) award in the category “Best Information Technology Student” in London. Since November 2011, Volker Seeker has been a PhD student at the University of Edinburgh
-- The above is new material, not present in the Y3 deliverable --