Dr. Chen-Yong Cher‘s bio
Download 10.14 Kb.
|
| Dr. Chen-Yong Cher‘s bio
Dr. Cher has been with IBM Research for the past five years, most of his research result in publications in independently referred ACM and IEEE journals and conferences. Dr. Cher contributes to several successful government projects, such as PERCS and Sequoia project. In collaborations with Dr. Alan Gara and Dr. Jim Sexton of IBM, and Lawrence Livermore National Lab (LLNL), Dr. Cher has conducted detailed, accurate power and performance simulations to analyze workload-driven power-performance. Dr. Cher is also contributing to soft-error reliability analysis of the next Blue Gene. Believing that software-based energy management is lower-cost, Dr. Cher conducted software research on Cell processor, the key component of RoadRunner which is the current fastest and greenest supercomputer in the world, to run general purpose workload such as Java with competitive performance. Because static power is exponentially dependent on temperatures, with collaborators from Pennsylvania State University, Dr. Cher defined and implemented a Linux-based thermal- and variation-aware analysis. The work was the world’s first study of its kind on a real multi-core processor. They then designed a variation-aware assessment and scheduling scheme that adjusts to every chip’s unique birthmark to save additional energy without sacrificing performance. Dr. Cher also publishes papers in collaboration with Princeton University and Barcelona Supercomputing Center. Dr. Chen-Yong Cher’s Publications Víctor Jimenez, Francisco J. Cazorla, Roberto Gioiosa, Eren Kursun, Canturk Isci, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, and Mateo Valero , Power and Thermal Characterization of POWER6 System. In the International Conference on Parallel Architectures and Compilation Techniques (PACT), Vienna, Austria, Sep. 2010. Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta S. Gupta, Hendrik Hamann, Hans Jacobson, Prabhakar N. Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor Zyuban. Power-efficient, reliable microprocessor architectures: modeling and design methods. Proceedings of the 20th symposium on Great lakes symposium on VLSI (GLVLSI'10), 2010. C. Johnson, D. H. Allen, J. Brown, S. Vanderwiel, R. Hoover, H. Achilles, C-Y. Cher, G. A. May5 H. Franke, J. Xenedis, C. Basso. A Wire-Speed Power™ Processor: 2.3GHz 45nm SOI with 16 Cores and 64 Threads. 2010 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (IEEE ISSCC’10). Performance and power evaluation of an in-line accelerator. A Rico, J H Derby, R K Montoye, T H Heil, C Y Cher, P Bose, Proceedings of the 7th ACM international conference on Computing frontiers, 2010. Eren Kursun and Chen-Yong Cher. Temperature Variation Characterization and Thermal Management of Multicore Architectures. IEEE Micro 29, 1 (Jan. 2009), 116-126. Eren Kursun and Chen-Yong Cher. Variation-aware Thermal Characterization and Management of Multi-core Architectures (IEEE ICCD’08), Best Paper in Computer Systems Track, IEEE Computer Society. Also selected for 2008 IEEE MICRO Top Picks of Computer Architecture Conferences. Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, Mateo Valero. Software-Controlled Priority Characterization of POWER5 Processor (ACM ISCA’08). European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC) Paper Award. Chen-Yong Cher, Michael Gschwind. Cell GC: using the cell synergistic processor as a garbage collection coprocessor (ACM VEE '08). Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Henrdrik Hamann, Alan Weger, Pradip Bose. Thermal-aware task scheduling at the system software level. (ACM ISLPED '07). Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi. An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget (IEEE MICRO’06). Eren Kursun, Chen-Yong Cher, Alper Buyuktosunoglu and Pradip Bose, Investigating the Effects of Task Scheduling on Thermal Behavior. Third Workshop on Temperature-Aware Computer Systems, held in conjunction with ISCA-33. ACM/IEEE, May 2006. Chen-Yong Cher, Il Park, T. N. Vijaykumar. Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput? In Proceedings of the 19th International Conference on Architecture of Computing Systems - ARCS 2006, Frankfurt/Main, Germany, (March 13-16, 2006), 232-251. Chen-Yong Cher, Antony L. Hosking, T. N. Vijaykumar. Software prefetching for mark-sweep garbage collection: hardware analysis and software redesign. In Proceedings of the 11th international Conference on Architectural Support For Programming Languages and Operating Systems (Boston, MA, USA, October 07 - 13, 2004). ASPLOS-XI. ACM, New York, NY, 199-210. Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy. VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power. In Proceedings of the 36th Annual IEEE/ACM international Symposium on Microarchitecture (December 03 - 05, 2003). IEEE Computer Society, Washington, DC, 19. Chen-Yong Cher, T. N. Vijaykumar. Skipper: a microarchitecture for exploiting control-flow independence. In Proceedings of the 34th Annual ACM/IEEE international Symposium on Microarchitecture (Austin, Texas, December 01 - 05, 2001). IEEE Computer Society, Washington, DC, 4-15. Download 10.14 Kb. Share with your friends:
|