J. T. O. Phase II (Switching Specialisation) : axe-10 communication cp-emrp

T
he solution to this problem is Common Channel Signalling. We may imagine an arrangement as shown in Figure 2.5.7.

However, it would be too costly to have separate lines for this signalling. A more economical solution is to “steal” one of the speech channels to the parent exchange and use it for the sending of signals. The channel used for this purpose is no. 16. The signalling information from CP is processed and reformatted in a signalling terminal located in the parent exchange. This terminal is called Signalling Terminal Central (STC).

Next, STC puts the signalling information into channel 16. This is done in an equipment unit called the Exchange Terminal Circuit (ETC), which serves as an interface between the PCM line and the group switch. The signalling information is then extracted in the ETB equipment of the subscriber stage.

The Signalling Terminal Regional (STR) reformats the signalling information and sends it to the EMRP concerned on the EMRP Bus (EMRPB).

STCs, STRs, EMRPBs and signalling links (PCM systems with channel 16) are always duplicated for reasons of reliability. See Figure 2.5.8.

I
f these safety measures do not suffice to prevent breaks in the communication between the subscriber stage and the parent exchange, it will still be possible to handle a certain portion of the traffic. In these situations the block ATL (Autonomous Traffic at Link Failure) takes over the function of the register, setting-up internal calls in the subscriber stage by means of the Time Switch Bus. This is referred to as “stand alone function”.

A described unit is called a Remote Subscriber Switch (RSS), or Remote Subscriber Unit (RSU).

In documents and commands, a subscriber stage is called an Extension Module Group (EMG).

SSS in PARENT EXCHANGE

A subscriber stage that is not detached (but located in the parent exchange) has a somewhat different design. The reason for this is the much shorter distance to the central processor and to the group switch.

The differences are as follows:

• 
  The ETB printed board assembly is replaced by a printed board assembly called Junctor Terminal Circuit (JTC).
  
• 
  No ETC magazine is used, which means direct communication between JTC and the group switch.
  
• 
  STC and STR are combined to form a magazine called a Regional Processor Bus Converter (RPBC). No signalling on channel 16.
  
• 
  All 32 channels to the group switch can be used for speech.
  

Below follows a list of “miscellaneous” equipment, i.e. equipment used for testing subscriber lines, etc. See Figure 2.5.10.

• 
  REU (Ringing generator) is equipment for generating ringing current. REU is located in an EM, which means that it serves 128 subscribers. The ringing current is connected to the subscriber line via a relay in the line interface circuit.
  
• 
  SLCT (Subscriber Line & Circuit Tester) is a printed board assembly in EM used for routine testing of subscriber lines and line interface circuits. The equipment is connected to the subscriber line via a relay in the line interface circuit.
  
• 
  SULT (Subscriber Line Tester) is an equipment unit which is common to a complete EMG (up to 2048 subscribers). SULT carries out more detailed checking of subscriber lines. The tests can be ordered by command.
  
• 
  SE-XXX (Special Equipment) is used for certain types of subscriber equipment, for instance, coin telephones or subscribers’ private meters. The equipment is connected between the telephone and the line interface circuit.
  
• 
  I
  OIM (I/O Interface Magazine) is an equipment unit to which external alarms (fire alarms, power failure alarms, etc.) can be connected. Portable I/O devices, can be connected as required. IOIM is used for detached subscriber stages only.
  

Today four different processors are used in the AXE system. The software of all these is fully compatible as regards application programs, i.e. one and the same program can be used in all four processor types.

The processors are called APZ 210, APZ 211, APZ 212 and APZ 213. The first processor developed for the AXE system was the APZ 210, and a large number of these are in operation all over the world. This processor has now been replaced by the three other variants, which differ mainly in terms of capacity.

The junior in the processor family is the one that was designed last: the APZ 213. The capacity of this processor makes it best suited for installation in very small exchanges (with up to 2000 subscribers).

The APZ 211 is the medium-sized member of the family. Used in exchanges with up to 40,000 subscribers, it is the most common of the three types.

The largest version is the APZ 212, whose enormous capacity makes it suitable for use in large transit exchanges. By way of comparison, its computing power would be capable of running a 200,000 subscriber local exchange.

In some contexts, the capacity of a processor used to control telephone exchanges is expressed in a unit called BHCA (Busy Hour Call Attempts).

The table below gives the BHCA values for the four processor types.

APZ 210 144 000 BHCA

APZ 211 150 000 BHCA

APZ 212 800 000 BHCA

APZ 213 11 000 BHCA

The only processor types dealt within this book are the APZ 211 and APZ 212.

SUBSCRIBER in APZ

As we have already seen, the AXE system is made up of one switching (telephony) part, APT, and one control part, APZ. The control part is implemented in hardware and software, which is divided into subsystems and function blocks in the same way as in APT.

APZ comprises the following subsystems:

• 
  CPS (Central Processor Subsystem): This subsystem, which contains both software and hardware, performs functions such as job administration, store handling, loading and changing of programs.
  
• 
  MAS (MAintenance Subsystem): The MAS in APZ 211 consists only of software, whereas its counterpart in APZ 212 contains both software and hardware. The primary task of the subsystem is to locate hardware faults and software errors, and to minimize the effects of such faults/errors.
  
• 
  RPS (Regional Processor Subsystem): This subsystem contains both software and hardware. The hardware is in the form of regional processors, while the software consists of administrative programs located in the regional processors.
  
• 
  MCS (Man-machine Communication Subsystem)
  
• 
  SPS (Support Processor Subsystem)
  
• 
  DCS (Data Communication Subsystem)
  
• 
  FMS (File Management Subsystem)
  

We will now examine in detail the two types of central processors that can be used in the AXE system.

Let us start by establishing what characteristics are identical in the two processors:

• 
  Duplicated hardware. To minimize the effects of hardware faults, two identical processors are used, each having its own store. The two processors are called the A-side (CP-A) and the B-side (CP-B).
  
• 
  Parallel operation: Both sides execute the same programs - instruction by instruction. Since the two sides are compared continuously, hardware faults will be detected immediately.
  

After a side has been halted and repaired, it must return to operation in parallel with the faultless side. To permit this, data is transferred from the executive side to the repaired side. This process is called UPDATING.

The purpose of updating is to ensure that both sides contain the same programs and the same data.

After the updating, the A-side will be EXECUTIVE and the B-side will be STANDBY. Since both sides will receive the same information from the regional processors, they will contain exactly the same data and do exactly the same work.

W
e will begin by studying the smaller of the two processors: the APZ 211. Figure 2.6.1 shows one of the sides of an APZ 211 processor.

The processor consists of a number of function blocks, each performing a specific function. Each function consists of a number of printed board assemblies.

F
igure 2.6.2. shows the hardware function blocks in APZ 211, and the buses that interconnect them.
AML = Automatic Maintenance Link

AMU = Automatic Maintenance Unit

BAC = Bus Access Controller

BCL = Bus Control Link

CP-A = Central Processor, A-side

CP-B = Central Processor, B-side

CPB = Central Processor Bus

CPU = Central Processing Unit

IRPHB = Interregional Processor Handler Bus

MS = Main Store

RP = Regional Processor

RPH = Regional Processor Handler

UMB = Updating and Match Bus

UPM = Updating and Match Unit
Figure 2.6.2

Block Diagram, APZ 211

In the following we are going to study each function block separately.

• 
  RPH (Regional Processor Handler): RPH handles the signalling to and from the regional processors. The unit operates completely independently in performing this task. Each RPH can handle up to 128 regional processors, and up to four RPHs can be connected. RPH contains a powerful 16-bit microprocessor, which has its own store. The unit has access to the central bus in the processor and can itself address the store of the central processor, MS.
  
• 
  M
  S (Main Store): This is the memory of APZ 211. MS contains both programs and data, and has a maximum storage capacity of 16M 16-bit words. The store functions include an error detection and correction code, which means that uncomplicated bit errors can be corrected without affecting the traffic handling. This code requires another 6 bits per word. Figure 2.6.3 shows an MS storage board.
  

• 
  CPU (Central Processor Unit): This is the very heart of the processor. CPU performs all arithmetical and logical operations. In addition, it contains the microprogram. What is a microprogram? - See Figure 2.6.4.
  

MS = Main Store

Each machine instruction corresponds to a number of microinstructions. Thus, the control information sent to the other units in the central processor is in the form of microinstructions.

• 
  BAC (Bus Access Controller): The chief task of this unit is to determine “who” will be allowed to send data on the bus in the central processor (CPB - Central Processor Bus). Both CPU and RPH can have access to CPB.
  
• 
  UPM (Updating and Match Unit): This function block has two important functions: (i) In normal parallel operation, the UMB (Updating and Match Bus), which interconnects the UPM function blocks, is used for continuous comparison between the two CP sides. The comparison is made in the standby side, (ii) In updating operations the same bus is used to transfer data to the side that is being updated. The updating is controlled by the BAC function block, and the two BAC function blocks are interconnected by a bus called Bus Control Link (BCL).
  
• 
  AMU (Automatic Maintenance Unit): The chief task of this function block is to initiate testing of the processors on detection of hardware faults. AMU also decides which of the sides should be EXECUTIVE. AMU is connected to both sides over a bus called Automatic Maintenance Link (AML).
  

Now, we will examine the larger and more powerful of the two processors: the APZ 212.

The capacity of APZ 212 is about five times that of APZ 211. How is this possible ?

The reason is twofold:

1. 
   Each processor side has two processors: one that administers the work, and another that executes the actual program.
   
2. 
   Much work can be done in parallel in the processor. Tasks that require several sequences in APZ 211 may only need one sequence in APZ 212.
   

A simplified block diagram of the processor is shown in Figure 2.6.6.

CP-A = Central Processor, A-side

• 
  RPH (Regional Processor Handler): As in APZ 211, RPH handles communication with the regional processors.
  
• 
  SPU (Signal Processor): This processor administers the work in APZ 212. It also prepares the work to be done by IPU (see below), thus enabling the latter unit to execute programs continuously. We may compare SPU to a secretary who tells her boss where and when he is to attend meetings, makes new appointments, and does the mailing and telephoning - thus giving the boss (the IPU) time to make important decisions.
  
• 
  IPU (Instruction Processor): As has been said, IPU’s chief task is to execute programs, and SPU tells IPU the address at which it should start executing them. IPU has access to three storage units called PS, RS and DS. The use of these stores will be dealt within Section 2.8.
  

• 
  MAU (Maintenance Unit): The main task of this unit is the same as that of AMU in APZ 211, i.e. to initiate tests in both sides in case of fault. MAU also decides which side is to be EXECUTIVE.
  

As we have seen, much of the work done in APZ 212 is performed in parallel.

To clarify this we will have a closer look at the IPU structure (which is similar to that of SPU).

A
conventional computer/processor usually has only one central bus for internal transfers, whereas IPU has three internal buses for data transfers. See Figure 2.6.7.

Adding together two numbers in a conventional processor requires four phases:

In APZ 212 the above 4-phase operation can be performed in a SINGLE phase. NUMBER 1 is sent on bus A, simultaneously with the sending of NUMBER 2 on bus B. Addition takes place in ALU, which then sends the result on the result bus to the desired unit.

As we know, the Central Processor (CP) is assisted by a number of Regional Processors (RP). The bus for communication between the CP and the RPs is called the Regional Processor Bus (RPB).

All regional processors are duplicated for reasons of reliability. However, their method of interworking differs somewhat from that of the two central processors. Two RPs operate normally according to the LOAD SHARING principle, which means that one RP controls one half of the equipment while the other RP controls the other half. If a fault occurs in an RP, the other RP can take over control of all the equipment.

The equipment controlled by an RP pair are arranged in groups called Extension Modules (EM). Each RP pair normally controls 8 or 16 EMs.

An EM is usually a magazine equipped with printed board assemblies, but it may also consist of a single printed board assembly.

Examples: A TSM - the time switch in the group.

switch - is a magazine made up of 18 printed board assemblies. This is an EM.

An ETC (digit trunk) is a printed board assembly accommodated in a magazine. This is also an EM.

For the regional processors to be able to control the equipment of an EM there is a bus called the Extension Module Bus (EMB).

Let us now study Figure 2.6.8 which illustrates what we have said above.

Figure 2.6.9 shows a regional processor.

A
regional processor consists of 5 printed board assemblies: one for power supply, two for communication with the central processors (A-side and B-side), and two which constitute the actual processor. One of the two last mentioned printed board assemblies (MEU) is equipped with a store and with circuits for communication with the EM bus. The other one (PRO) has microprograms, an ALU, and circuits for address calculation. See Figure 2.6.10.

All processors and signalling terminals used in the subscriber stage have 8-bit microprocessors as their “nuclei”. The reason for this is primarily economic: microprocessors are cheap.

Each signalling terminal (STC, STR) has a processor which handles and supervises the signalling between CP and EMRP.

Each EM in the subscriber stage is associated with an Extension Module Regional Processor (EMRP). Since the EMRPs only control one EM each, their capacity is smaller than that of a “regular” RP.

What would happen if parts or the whole of the control system should stop functioning? Well, the exchange would collapse, resulting in a catastrophic traffic situation. And this, of course, must be prevented at all costs.

None of today’s manufacturers of electronic components can guarantee trouble-free operation for 30-40 years (the estimated service life of an exchange). So we know that components will break down.

How can we prepare for this?

The answer is duplicated hardware, and programs to control it.

The whole of the AXE control system is duplicated up to the level represented by an EM:

• 
  Duplicated central processors.
  
• 
  Duplicated RP buses.
  
• 
  Duplicated regional processors.
  
• 
  Duplicated EM buses.
  

• 
  Duplicated STCs.
  
• 
  Duplicated signalling links.
  
• 
  Duplicated STRs.
  
• 
  Duplicated EMRP buses.
  

The system has a large number of built-in check functions for supervising the hardware.

These functions include anything from comparison between the CP sides to simple parity checks on buses.

When a fault is detected in the control system, blocking of the faulty unit and switch-over to the faultless side is always initiated.

Then follows more comprehensive testing of the faulty unit, giving one of two results:

1. 
   The fault was temporary (it only lasted for a very short period of time). Information on temporary faults is always stored, and if the number of temporary faults reaches a preset critical value, the unit involved will be blocked.
   
2. 
   The fault was permanent. Alarm information is sent to the exchange personnel. The alarm printout indicates the printed board assembly (ies) that are suspected of being faulty. We will revert to this in Chapter 5.
   

Finally, we are going to study the method used to diagnose a fault in the central processor. As said before, the two CP sides are compared continuously. The purpose of this comparison is to detect hardware faults. If there is mismatch between the two sides, then one of them must be faulty. To decide which side is faulty, a 20 ms test program is initiated.

After the test program has been executed, the faultless side continues to process traffic. This is done without disturbing the telecom service.

AMU in APZ 211 and MAU in APZ 212 are the units that initiate these operations. After the faulty side has been blocked, AMU/MAU initiates updating of the faulty side. The purpose of the updating is twofold: to see whether the fault still exists, and to locate it. If the fault is not of a temporary nature, an alarm will be initiated on completion of the updating phase.

F
igure 2.6.11 illustrates the process described above.