Vhdl code: 3x8 decoder

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Date	10.05.2022
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	#58745

lab4
LAb Assembly-Language (1)

VHDL Code:
3x8 DECODER

8x3 ENCODER

Simulation Results:
For each combination of inputs take a screenshot of the output
For Decoder :
Block Diagram

Test bench Simulation:

For Encoder:

B lock Diagram

Test Bench Simulation:

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