Army 17. 1 Small Business Innovation Research (sbir) Proposal Submission Instructions

KEYWORDS: DVE, degraded visual environments, real time image enhancement

TECHNOLOGY AREA(S): Electronics

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), which controls the export and import of defense-related material and services. Offerors must disclose any proposed use of foreign nationals, their country of origin, and what tasks each would accomplish in the statement of work in accordance with section 5.4.c.(8) of the Announcement.

OBJECTIVE: Develop a spectrally agile sensor operating in the Long Wave Infrared (LWIR) that is capable of high definition spatial imaging across a number of narrow spectral bands. The sensor shall be capable acquiring a minimum of 1024 spatial channels and 128 spectral channels.

DESCRIPTION: Spectrally agile sensors (also known as hyperspectral sensors) have demonstrated the ability to provide remote sensing utility and actionable information to the warfighter. Currently deployed platforms utilize state-of-the-art sensors combined with near real-time processing to generate detection products or alerts regarding targets of interest in seconds or minutes. Historically though, many of this class of sensor has suffered from very low or reduced spatial coverage. With recent advancements in state-of-the-art focal plane arrays (FPAs) as well as new spectrometer designs, it is now possible to achieve High Definition narrow band spectral imagery in the LWIR. This class of sensor would then be able to provide significant improvements in detection performance for a large class of problems of interest to the Army, such as base security, perimeter defense, and route clearance.

This topic seeks to develop a new class of spectrometer capable of near diffraction limited performance across the 8-13 micron section of the LWIR spectrum with the smaller pixels (typically 18-20 microns) found in new FPAs. This should be achieved across the full and typically large spatial extent of the FPA. Noise performance of the new sensor should be less than 1 microwatt per centimeter squared per micrometer per steradian on average across the whole LWIR band.

PHASE I: Model the proposed system, taking into account potential user feedback in order to determine key sensor design parameters including number of bands, spatial resolution, required optical throughput, and anticipated signal-to-noise ratio (SNR) at each wavelength. Analyze anticipated temporal latency in the proposed system in order to determine anticipated time between image acquisition and presentation of results to user. If possible, demonstrate in a laboratory or benchtop configuration a scaled model of the spectrometer system.

PHASE II: Construct the proposed system developed in phase I. System shall be built, calibrated, tested in the laboratory, and evaluated in a field trial during phase II. Testing shall be conducted against targets or target surrogates relevant to the problems facing the warfighers in the active military theater.

PHASE III DUAL USE APPLICATIONS: In a phase III effort, the system shall be ruggedized for fielding in a theater-relevant environment. In addition, transitional opportunities will be identified in the non-military area. These may include geological mapping, border surveillance, and entry control point security. Potential transition to commercial production is an enhanced focus area. Special attention will be paid to proposals that clearly identify potential commercial partners or markets.

REFERENCES:

1. Proceedings of SPIE -- Volume 5415, Detection and Remediation Technologies for Mines and Minelike Targets IX, Russell S. Harmon, J. Thomas Broach, John H. Holloway, Jr., Editors, September 2004, pp. 1035-1041

2. Detection Algorithms for Hyperspectral Imaging Applications, Manolakis & Shaw, IEEE Signal Processing Magazine (1053-5888/02) January 2002, pp. 29-43

3. Development and Initial Results of the LACHI Compact LWIR Hyperspectral Sensor at US Army RDECOM CERDEC NVESD, Zeibel et. al., Military Sensing Symposium on Passive Sensors. (March 2011)

4. J. Silny et. al., “Aces Hy Performance Characterization and Calibration,” Military Sensing Symposium on Passive Sensors (March 2012)

5. Recent Advances in Mobile Ground-Based Hyperspectral Detection of IEDs, Home Made Explosives, and Energetics-Related Materials., Yasuda et. al., Military Sensing Symposium on Battlefield Survivability and Deception. (March 2012)

KEYWORDS: spectrometer, spectra, situational awareness, spectral processing, LWIR, hyperspectral

TECHNOLOGY AREA(S): Electronics

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), which controls the export and import of defense-related material and services. Offerors must disclose any proposed use of foreign nationals, their country of origin, and what tasks each would accomplish in the statement of work in accordance with section 5.4.c.(8) of the Announcement.

OBJECTIVE: Develop a digital pixel based uncooled longwave infrared (LWIR) bolometer array. Pixels within the array should be able to acquire and store data natively in a digital manner, while maintaining a low noise equivalent delta temperature (NEDT) and short time constant. The imager should be capable of no less than 16 bits of dynamic range scene content.

DESCRIPTION: Current readout technology for uncooled IRFPA is still predominantly analog. The A/D conversion occurs in the camera electronics. There is an increasing interest in the uncooled IR industry to improve the performance and reduce Size, Weight, and Power (SWaP) of uncooled camera systems by moving the A/D conversion function on chip. The current industry standard approach is to perform A/D in the column circuitry. However, it is generally accepted that A/D conversion at the detector allows highest performance due to noise immunity of digital signals right at the front end. This topic seeks to advance uncooled IR technology by the development of a digital readout with pixel level A/D conversion for high dynamic range, high frame rate uncooled IR imaging.

Uncooled technology would greatly benefit by moving to a pixel level A/D conversion readout architecture. The commercial CMOS imaging sensor industry is moving to a system on a chip architecture, with 3D IC integration of photodetectors, A/D converters, digital signal processing, and data storage to improve product performance, efficiency, and cost. Currently there are efforts in the DoD community to leverage the commercial industry’s 3D IC stacking technology and on-chip digital signal processing for high-performance cooled IRFPA technology. To fully realize the benefits of 3D stacking and on-chip digital signal processing, A/D conversion in the pixel is required. Imagers are massively parallel architectures and thus are best suited for pixel-level digital processing. Pixel-level A/D conversion would allow efficient image processing, higher dynamic range, and higher frame rate imaging.

PHASE I: The vendor should design and model an in-pixel digital readout integrated circuit (DROIC) for uncooled LWIR applications that supports no less than 16 bits of dynamic range. The proposed concept should include the ability to support features not typically possible in standard analog ROIC technology, such as active noise mitigation, in-pixel non-uniformity correction (NUC), and/or scene stabilization.

PHASE II: Produce an uncooled LWIR imaging sensor based on the designed DROIC. Achieving state-of-the-art bolometer performance is not inherently a main driver in this effort, though the sensor should be capable of effectively demonstrating the benefits of the digital-in-pixel technology.

PHASE III DUAL USE APPLICATIONS: Deliver additional prototype sensors for investigation of a variety of problems of military relevance to the Army. These may include applications such as operation in a degraded visual environment, 360 degree situational awareness, and threat warning.

REFERENCES:

1. U. Ringh, C. Jansson and K. C. Liddiard, CMOS analog-to-digital conversion for uncooled bolometer infrared detector arrays, Proc. SPIE 2474, Smart Focal Plane Arrays and Focal Plane Array Testing, 88 (1995)

2. C. A. Marshall, N. R. Butler, R. J. Blackwell, R. Murphy and T. B. Breen, Uncooled infrared sensors with digital focal plane array, Proc. SPIE 2746, Infrared Detectors and Focal Plane Arrays IV, 23 (1996)

3. M. Kelly, R. Berger, C. Colonero, M. Gregg, J. Model, et al., Design and testing of an all-digital readout integrated circuit for infrared focal plane arrays, Proc. SPIE 5902, Focal Plane Arrays for Space Telescopes II, 59020J (2005)

4. G Mizuno, P Oduor, AK Dutta, and NK Dhar, High performance digital read out integrated circuit (DROIC) for infrared imaging, Proc. SPIE 9854, Image Sensing Technologies: Materials, Devices, Systems, and Applications III, 985409 (2016)

5. B Tyrrell, R Berger, C Colonero, J Costa, M Kelly, E Ringdahl, K Schultz, and J Wey, Design approaches for digitally dominated active pixel sensors: leveraging Moore's Law scaling in focal plane readout design, Proc. SPIE 6900, Quantum Sensing and Nanophotonic Devices V, 69000W (2008)

KEYWORDS: digital ROIC, DROIC, readout integrated circuit, uncooled LWIR, bolometer, thermal, infrared

TECHNOLOGY AREA(S): Electronics

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), which controls the export and import of defense-related material and services. Offerors must disclose any proposed use of foreign nationals, their country of origin, and what tasks each would accomplish in the statement of work in accordance with section 5.4.c.(8) of the Announcement.

OBJECTIVE: Design and develop the algorithms needed to fuse multiple airborne Intelligence, Surveillance, and Reconnaissance (ISR) sensor modalities, with a focus on electro optical/infrared (EO/IR) sensors.

DESCRIPTION: Over the past decade, Airborne ISR sensors have played a large role in U.S. Army actions. Many of these sensors were deployed as Quick Reaction Capabilities (QRCs), and as such often created stove-piped data processing algorithms. As a result, intelligence products created by these stove-piped systems were limited to the data provided by only the specific sensor modality creating the product. To create products from multiple data sources, a user was forced to manually combine information from multiple sensor modalities. As these sensors transition towards formal Programs of Record (PoR), the Army desires to fuse data from multiple modalities to create new capabilities and/or increase the robustness and fidelity of existing products. To support this goal, Aided Target Recognition / Detection (AiTR/AiTD) algorithms need to be developed to autonomously fuse airborne ISR sensor.

PHASE I: The Phase I goal is to demonstrate techniques and concepts that could be used to autonomously fuse airborne ISR sensor data from multiple (2 or more) modalities. To support development of these algorithms the contractor must provide, or simulate, their own data for the selected modalities to fuse. The Phase I proposal must describe the data to be used during this phase and give justification as to why this data is valid. The concepts and techniques to be leveraged in Phase II will be demonstrated to government Subject Matter Experts (SMEs). The demonstration of fully autonomous algorithms and real-time hardware is not required during this phase. However, the concepts to be developed in Phase II must be proven.

PHASE II: The Phase II goal is to develop autonomous algorithms for fusion of ISR sensors to demonstrate improved ability to detect targets and events of interest, or perform other relevant ISR missions. Autonomous algorithms refer to the autonomous nature in which the sensor data is fused and a target or event is detected. The results of these algorithms will still require a user to validate the detected target or event. The algorithms developed in this phase will be based off the approaches demonstrated in Phase I; however, they will be matured to the point of not needing manual interaction. During this phase, the fusion algorithms will be compared against similar single modality approaches to demonstrate improved performance and robustness. Phase II will conclude with a report describing algorithm performance and robustness as well as recommendations for future improvements to the algorithm(s).

PHASE III DUAL USE APPLICATIONS: The Phase III goal is to take the algorithms from a TRL 5 to a mature state such that they can be transitioned. This includes the system and algorithm improvements described in the Phase II report. These algorithms could then be transitioned to any number of ISR programs of record through an Engineering and Manufacturing Development (EMD) program. Examples of such programs are Gray Eagle, EMARS-G, and ARL-E. The potential for commercial applications is considerable with such mission areas as search/rescue and first responders for situational awareness.

Proc. SPIE 1003, 236–246 (1989).

TECHNOLOGY AREA(S): Materials/Processes

OBJECTIVE: The objective of this topic is to investigate ways to improve the cycle life and capacity retention of the lithium-sulfur battery chemistry by addressing the negative effects of parasitic polysulfide reactions.

DESCRIPTION: One of the CERDEC’s main research interests is Tactical and Deployed Power, a goal of which is to advance Soldier and mobile power and energy generation. Increasing the energy density of military batteries is a major focus area in the pursuit of this goal. Lithium-sulfur, with its 2600 Wh/kg theoretical specific energy (550 Wh/kg demonstrated), has been identified as a promising chemistry to achieve the CERDEC short-term rechargeable battery target of 300 Wh/kg. A higher energy rechargeable power source would have impacts across all areas of the CERDEC mission, from commanding the operation to enabling and creating decisive effects.

Despite its high energy, the lithium-sulfur chemistry has not yet reached the technical maturity necessary for commercialization. The majority of the practical issues with the lithium-sulfur chemistry can be attributed to the dissolution of lithium polysulfide in liquid electrolyte, which results in parasitic reactions. These reactions cause low sulfur utilization and poor cycling efficiency via capacity fading. Recent efforts have been focused on either suppressing diffusion of the dissolved polysulfides out of the cathode or protecting the lithium anode from reacting with the dissolved polysulfides. This topic proposes the investigation of these or other methods to mitigate the inhibiting effects of polysulfide dissolution. Findings will then be incorporated into electrode materials that can provide improved cycle life performance while maintaining the high specific energy intrinsic to the lithium-sulfur chemistry.

PHASE I: Investigate the feasibility of practical solutions to the polysulfide dissolution problem affecting the lithium-sulfur chemistry. Using the results of this investigation, synthesize and characterize proof-of-concept electrode materials that will provide the potential for improved cycle life and capacity retention. A small quantity of electrode material is an encouraged, but not required, Phase I deliverable.

PHASE II: Continue the research efforts initiated in Phase I. Optimize the electrode materials and test the impact on the cyclability of resultant lithium-sulfur cells. Construct cells utilizing the electrode materials developed during Phase I and optimized during Phase II and provide CERDEC with an appropriate number of cell samples to conduct electrochemical performance testing. Performance targets for deliverables include specific energy of 300 Wh/kg at the cell level and 100 cycles of at least 80% capacity retention.

PHASE III DUAL USE APPLICATIONS: Transition technology to the U.S. Army. Many CERDEC applications are restricted by the energy limitations of the Soldier power source. There is a consistent need for improved energy and cycle life, to either extend mission length, reduce the weight of Soldier-carried batteries, or allow for the always-increasing power draw of advanced electronic capabilities. The lithium-sulfur battery chemistry is the Army’s most near-term high-energy target. Successful Phase I and II development provides opportunities for technology transition to Project Manager Soldier Warrior (PM SWAR) programs of record.

REFERENCES:

1. Cheon, et al. "Rechargeable Lithium Sulfur Battery: Structural Change of Sulfur Cathode During Discharge and Charge." Journal of The Electrochemical Society, 150(6). 2003

2. Cheon, et al. "Rechargeable Lithium Sulfur Battery: Rate Capability and Cycle Characteristics." Journal of The Electrochemical Society, 150(6). 2003

3. Zhang, Sheng S. "Liquid electrolyte lithium/sulfur battery: Fundamental chemistry, problems, and solutions." Journal of Power Sources, 231. 2013

4. Li, et al. "Status and prospects in sulfur-carbon composites as cathode materials for rechargeable lithium-sulfur batteries." Carbon, 92. 2015

KEYWORDS: rechargeable battery, lithium-sulfur, dismounted Soldier, portable power

TECHNOLOGY AREA(S): Electronics

OBJECTIVE: Develop a highly reliable, externally aided, GPS receiver that leverages precise time information from an atomic clock with increased performance and integrity over typical feed forward time server designs.

DESCRIPTION: GPS is the ubiquitous source of precise time and stable frequency for many Command, Control, Communications, Computers, Intelligence, Surveillance and Reconnaissance (C4ISR) systems. Time is required for radar, high bandwidth communication, RF sensors, guidance systems, electronic warfare, and in fact, GPS receivers themselves.

Many systems utilize a GPS time server with a stable holdover clock, such as a rubidium or other atomic clock, as a backup to maintain accurate time during short GPS outages, disciplining the holdover clock via the GPS receiver 1 Pulse Per Second (1 PPS) when GPS is available. This feed forward approach fails to capitalize on the stability of the holdover clock and to properly safeguard the holdover clock from faulty signals originating from the GPS receiver (possibly due to poor signal environment or an anomalous GPS satellite signal). Current implementations are vulnerable to errors induced into the GPS signal, such as multipath, environmental effects, signal anomalies, or GPS control segment errors. These errors will propagate into the timing output of the GPS disciplined clock unchecked by current disciplining implementations, potentially impacting their client systems.

Better overall performance can be achieved if an integrated or coupled approach is applied. This integrated approach would treat the inputs of the holdover clock and the GPS receiver as sensor inputs to be evaluated and weighted to determine the best timing output, as well as deciding when to discipline the holdover clock. More deeply integrated methodologies would further leverage the holdover clock to aid the GPS receiver, increasing the availability and accuracy of the receiver by improving resistance to interference, multipath rejection, three satellite navigation, time to subsequent fix, etc. These methods would lead to a more robust positioning and timing system with better performance and resilience.

The above example is one range of different techniques that could be used to better utilize and integrate a stable time and frequency source with a GPS receiver. However, other novel solutions to the stated problem will be allowed and considered.

Current GPS receivers do not typically allow the type of modification necessary to integrate external sensors as navigation aids, as this fully integrated approach requires. Instead a Software Defined Radios (SDRs) provides a flexible platform with which to provide capability. It is suggested that algorithms developed for this topic be demonstrated using The Global Navigation Satellite System Test Architecture (GNSSTA) SDR architecture. Though the methodologies and algorithms developed for this topic may be applied to a large number of different clocks, the low Size, Weight, Power, and Cost (SWAP-C) of the Chip Scale Atomic Clock make it a desirable demonstration clock.

PHASE I: Conduct a feasibility study that identifies the challenges and provides potential solutions for a fully integrated GPS receiver and precision clock design. Provide a fully integrated design and identify hardware and software necessary to build a prototype.

PHASE II: Develop prototypes and demonstrate capability to TRL 4. Provide test report and analysis detailing all conducted tests and possible solutions to any identified challenges. Deliver 3 prototypes for government evaluation, including all hardware and software necessary to operate and collect data from the prototypes. Prototypes should implement algorithms using both the GPS C/A and P codes at a minimum.

PHASE III DUAL USE APPLICATIONS: The purpose of this research effort is to develop a positioning and timing unit that could be useful for both personal navigation (via a low SWAP-C clock) and vehicular applications. The algorithms that are developed would enable an architecture capable of serving as both a high performance GPS receiver and a stable time source for client systems on a variety of platforms. Other applications include telecommunications systems in static installations, autonomous systems, radar platforms, and aviation applications. During this phase, the technical solution should look at applying this technique to other GNSS signals, such as M-code or the new GPS L5 civil signal, as well as the encrypted P(Y) code.