Shri vishnu engineering college for women:: bhimavaram department of information technology


Large Register Files and RISC Architecture



Download 3.29 Mb.
View original pdf
Page91/128
Date12.04.2022
Size3.29 Mb.
#58595
1   ...   87   88   89   90   91   92   93   94   ...   128
ITIIBTechIISemLecCOA
0910-ComputerSystemOverview02
Large Register Files and RISC Architecture

Instruction Execution Characteristics
The semantic gap is the difference between the operations provided in HLLs and those provided in computer architecture. . Designers responded with architectures intended to close this gap. Key features include large instruction sets, dozens of addressing modes, and various HLL statements implemented in hardware. Such complex instruction sets are intended to
• Ease the task of the compiler writer.
Improve execution efficiency, because complex sequences of operations can be implemented in microcode.
• Provide support for even more complex and sophisticated HLLs. The results of these studies inspired some researchers to look fora different approach namely, to make the architecture that supports the HLL simpler, rather than more complex To understand the line of reasoning of the RISC advocates, we begin with a brief review of instruction execution characteristics. The aspects of computation of interest areas follows


Download 3.29 Mb.

Share with your friends:
1   ...   87   88   89   90   91   92   93   94   ...   128




The database is protected by copyright ©ininet.org 2024
send message

    Main page