Shri vishnu engineering college for women:: bhimavaram department of information technology



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ITIIBTechIISemLecCOA
0910-ComputerSystemOverview02
1.
Interrupts

Maskable interrupts Received on the processor’s INTR pin. The processor does not recognize a maskable interrupt unless the interrupt enable flag (IF) is set.

Nonmaskable interrupts Received on the processor’s NMI pin. Recognition of such interrupts cannot be prevented.


UNIT-III
DEPARTMENT OF INFORMATION TECHNIOLOGY::SVECW Page 12
2.
Exceptions

Processor-detected exceptions Results when the processor encounters an error while attempting to execute an instruction.

Programmed exceptions These are instructions that generate an exception (e.g., INTO, INT, INT, and BOUND.
INTERRUPT VECTOR TABLE

Interrupt processing on the x uses the interrupt vector table. Every type of interrupt is assigned a number, and this number is used to index into the interrupt vector table. This table contains 256 bit interrupt vectors, which is the address (segment and offset) of the interrupt service routine for that interrupt number.

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