The Advanced User Guide for the Acorn Electron

Graphics Not available

1BIT/PIXEL

USERV 200 The user vector

BRKV 202 The BRK vector

IRO1V 204 Primary interrupt vector

IRQ2V 206 Unrecognised IRQ vector

OSCLI FFF7 CLIV 208 Command line interpreter

OSBYTE FFF4 BYTEV 20A *FX/OSBYTE call

OSWORD FFF1 WORDV 20C OSWORD call

OSWRCH FFEE WRCHV 20E Write character

OSNEWL FFE7 - - Write LF, CR to screen

OSASCI FFE3 - - Write character,

OSRDCH FFE0 &0D=LF, CR

OSFILE FFDD RDCHV 210 Read character

OSARGS FFDA FILEV 212 Load/save file

OSBGET FFD7 ARGSV 214 Load/save file data

OSBPUT FFD4 BGETV 216 Get byte from file

OSGBPB FFD1 BPUTV 218 Put byte in file

OSFIND FFCE GBPBV 21A Multiple BPUT/BGET

EVNTV 220 Event vector

UPTV 222 User print routine

NETV 224 Econet vector

VDUV 226 Unrecognised VDU commands

KEYV 228 Keyboard vector

INSV 22A Insert into buffer vector

REMV 22C Remove from buffer vector

CNPV 22E Count/purge buffer vector

IND2V 232

IND3V 234

NVRDCH FFCB Non-vectored read char.

NVWRCH FFC8 Non-vectored write char.

GSREAD FFC5 Read char. from string

GSINIT FFC2 String input initialize

OSEVEN FFBF Generate an event

OSRDRM FFB9 Read byte in paged ROM
Appendix E - Plus 1 ROM slot

Figure E.1 - The Plus 1 ROM slot connector
The cartridge interface is an earlier and simpler version of that later used on the BBC Master. Signals which differ between the two machines are shown with an asterisk in the diagram. The description below explains the function of all the signals and the differences between machines.
Note that most of the standard BBC Micro 1MHz bus signals are available from this slot. However, some of the uses are marginally different to the BBC 1MHz bus. A full specification for producing suitable add-ons is available from Acorn Computers Limited.
SIDE 'A'
1 +5V - Power supply

This is the system logic supply rail. No more than 150mA should be drawn by a cartridge in a fully configured Master 128 computer, ie with internal co-processor fitted. No more than 50mA should be drawn by a cartridge fitted to the Electron.

This is an active low signal during the PH12 period of the system clock. It is intended to switch on the output buffers of memory devices in cartridges. It is not guaranteed to be high at other times.

This signal is active low during system reset. It is not synchronised to any internal clock.

This pin is the CPU read/write line.

This pin changes function according to the memory region that the CPU is addressing. During accesses to devices in the region &FC00 to &FEFF it is equivalent to the CPU read/write line during nPH12. For all other accesses it is an active high chip select for memory devices. It is not guaranteed to be low at other times. This approach is necessary for compatibility with the Electron.

This input is the host computer PH12out.

No more than 20mA per cartridge should be drawn from this supply.

This is a "no connect" on the Electron.

This pin has two functions dependant on the position of a link in the host computer:

E/nB: this is the default function. It allows hardware in cartridges to "know" which into which type of computer it is plugged. It is a direct connection to +0V in the Master 128 and a floating node in the Electron.

CSYNC - Composite Synchronisation: Input with TTL levels

The system composite vertical and horizontal synchronisation is made available. It is intended to be used in genlock applications.

11 RNW/READY

This has different functions on the Electron and the Master 128.

READY - CPU wait state control : Open collector output

When driven low, this line will cause the CPU to extend its cycle until READY is released. This will only work on Electrons with CMOS CPUs. With NMOS CPUs it will only work on read cycles.
On the Master 128:

R/W - Data Direction Control : Input with TTL levels

This is the system data buffer direction control. If low, cartridges are being written to; if high and selected they may drive the bus during PH12.
12 nNMI - Non maskable interrupt : Open collector output

This signal is connected to the system NMI line. It is active low.

This signal is connected to the system IRQ line. It is active low.

When bit IFJ is set in the Master 128 ACCCON register, all accesses to the address range &FC00 to &FCFF will cause this select to become active. The ACCCON access is not applicable to the Electron.

When bit IFJ is set in the Master 128 ACCCON register, all accesses to the address range &FD00 to &FDFF will cause this select to become active. The ACCCON access is not applicable to the Electron.

This is the least significant bit of the ROM select latch located at &FE30 in the Master 128 and at &FE05 in the Electron.

This connection has different uses in the Electron and Master 128:

Clock is a 16MHz input with TTL levels.

Clock is a strap selectable function:

a) 16MHz input with TTL levels.

b) 8 MHz input with TTL levels.

The functions are selected by links on the host computer. The user should ensure that the links are correct for a given application and that proper termination is provided.
18 nROMSTB/nCRTCRST

This has different functions on the Electron and Master 128:

nROMSTB is an active low input using TTL levels which selects the location &FC73. This is intended to be used as a paging register.

nCRTCRST is an active low output signal meeting TTL levels of the system CRTC reset input. It is provided for use in genlock applications.

This is the filtered output of the sum of all audio inputs to the host computer. No significant load should be taken from this node.

This is the zero volt return for ADOUT. It should be used instead of the system zero volt connection to reduce audio noise.

This is merely a connection from one cartridge to the other.

This is an output to the host computer audio circuitry. It 'sees' an impedance of at least 1.0kOhms. Two

cartridges with audio output should not be inserted into the host computer at the same time.
22 0V - Zero volts

This is the system earth return for digital signals.

This is the system logic supply rail. No more than 150mA should be drawn by a cartridge in a fully configured Master 128 computer, ie with internal Second Processor fitted. No more than 10mA should be drawn by a cartridge fitted to the Electron.

This line provides an additional active low output enable for ROMs in the Electron. This corresponds to ROM position 13 and consequently responds quickly to service calls. it is low during the active low portion of PH12. It is not guaranteed to be high at other times.

A connection with a pull up to +5V is provided to the CRTC light pen strobe and system interrupt structure. When an on-board link is removed, this connection is merely a link from one cartridge to the other.

The buffered address lines hold addresses valid for 125ns after PH12 goes low. They are not buffered or held valid for an extended period in the Electron.

This is the earth return for digital signals.

Where two or more cartridges are fitted, any host computer links affect ALL cartridges.
Appendix F – Complete circuit diagram





Appendix G – Hardware expansions
It is beyond the scope of this manual to provide technical details on all of the available add-on hardware for the Electron, except for certain aspects of the official Plus 1 and Plus 3 units. To obtain this information, reference must be made to the relevant manuals supplied with the hardware.
The following tables provide a summary of the main hardware expansions available for the Electron.
General interface units

Manufacturer	Name	Facilities	Type
Acorn	Plus 1	2x cartridge slots Printer port Joystick port	Module
Andyk	RS423	RS423	Cartridge
Bud	Commander 3	Joystick port	Module
First Byte	Printer interface	Printer port	Module
First Byte	Joystick Interface	Joystick port	Module
Jafa	RS423	RS423	Cartridge
Lindy	Expansion unit	2x cartridge slots Printer port	Module
Mushroom	Printer interface and user port	User port Printer port	Module
Pace	Comms unit	RS423 Serial printer port	Cartridge
Power	Joystick interface	Joystick port	Module
PRES	AP1	2x cartridge slots Printer port Joystick port	Module
PRES	1Mhz bus	1Mhz bus	Cartridge
PRES	AP5	Tube, 1Mhz bus, User Port	Cartridge
PRES	AP6	6x ROM slots	Internal upgrade to Plus 1/AP1
PRES	User Port	User port	Cartridge
Project Expansions	User Port	User port	Cartridge
Ram electronics	Joystick interface	Joystick port	Module
Slogger	Plus 2	3x ROM sockets and 2x cartridge slots	Module
Slogger	Rombox	8x ROM sockets	Module
Slogger	Rombox+	4x ROM sockets, 2x cartridge slots	Module
Slogger	Joystick interface	Joystick port	Cartridge

Disc interfaces

Manufacturer	Name	Facilities	Type
Acorn	Plus 3	ADFS 1D00	Module
Cumana	Disc interface	CDFS E00	Cartridge
John Kortink	GOMMC	MMC interface	Module
PRES	AP3	ADFS 1D00	Cartridge
PRES	AP4	DFS E00	Cartridge
Slogger	Pegasus 400	DFS E00	Cartridge
Solidisk	Disc Interface	DFS E00 ADFS 1D00	Cartridge

RAM expansion units / Second Processors

Manufacturer	Name	Facilities	Type
Jafa	Shadow RAM board	32k shadow RAM / Turbo mode	Internal
PMS	E2P	6502 second processor inc 64k RAM	Cartridge
PRES	Advanced Battery Backed RAM	32k	Cartridge
PRES	Advanced s/w RAM	16k SWR	Cartridge
PRES	Advanced Quarter Meg RAM	256k	Cartridge
PRES	AP7	32k	Cartridge
Slogger	32k s/w RAM	32k SWR	Cartridge
Slogger	Master RAM board	32k shadow RAM / Turbo mode	Internal