Design and analysis of approximate compressors for multiplication
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www.pgembeddedsystems.com DESIGN AND ANALYSIS OF APPROXIMATE COMPRESSORS FOR MULTIPLICATION Abstract Inexact (or approximate) computing is an attractive paradigm for digital processing at nanometric scales. Inexact computingis particularly interesting for computer arithmetic designs. This paper deals with the analysis and design of two new approximate 4-2compressors for utilization in a multiplier. These designs rely on different features of compression, such that imprecision in computation(as measured by the error rate and the so-called normalized error distance) can meet with respect to circuit-based figures of merit of adesign (number of transistors, delay and power consumption). Four different schemes for utilizing the proposed approximatecompressors are proposed and analyzed for a Dadda multiplier. Extensive simulation results are provided and an application of theapproximate multipliers to image processing is presented. The results show that the proposed designs accomplish significantreductions in power dissipation, delay and transistor count compared to an exact design. Existing methods 1. Truncated multiplication method 2. An imprecise array multiplieris used for neural network applications omit some ofthe least significant bits in the partial products and thusremoving some adders in the array. 3. A variable correctiontruncated multiplier changes the correction term based on column n - k - 1. If allpartial products in column n - k - 1 are one, then the correctionterm is increased. Similarly, if all partial products in thiscolumn are zero, the correction term is decreased. 4. 4-2 exact compressors for approximate multiplication Proposed method Two novel approximate 4-2 compressorsare proposed and analyzed. It is shown that thesesimplified compressors have better delay and power consumptionthan the optimized (exact) 4-2 compressor designs. These approximate compressorsare then used in the restoration module of a Dadda multiplier. The multiplier is designed using these proposed compressors. A (exact) multiplieris usually composed of three parts (or modules) .
In the design of a multiplier, the second module playsa pivotal role in terms of delay, power consumption andcircuit complexity. Compressors have been widely usedto speed up the CSA tree and decrease its powerdissipation, so to achieve fast and low-power operation.The use of approximate compressors in the CSA tree of amultiplier results in an approximate multiplier.  
Advantages The approximate compressors reduce the transistor, power consumptionand delay compared with an exact design. Directory: securelogin -> upload -> project -> IEEE IEEE -> A robust Method for Encrypted Data Hiding Technique Based on Neighborhood Pixels Information(2011) IEEE -> Blind inpainting using and total variation regularization project -> Auto clutch for automobile project -> Button operated electro-magnetic gear shifting system for two wheeler project -> Automatic gear tramission for two wheeler project -> Car and bur reverse operating navigation system using ir rays project -> Hydrogen engine cum lpg IEEE -> Autonomy-Oriented Self-Equilibrium Routing Model in Traffic Networks(2010) Abstract IEEE -> Distributed Packet Buffers for High-Bandwidth Switches and Routers(2012) Abstract Download 8.03 Kb. Share with your friends:
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