R01 C. Gordon Bell, J. Craig Mudge, and John E. McNamara, Computer Engineering
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References R01 C. Gordon Bell, J. Craig Mudge, and John E. McNamara, Computer Engineering – A DEC View of Hardware Systems Design, Digital Equipment Corporation, 1978 ISBN 0 – 932376 – 00 – 2 R02. J. Hayes, Computer Architecture and Organization, McGraw-Hill, 1978. R03. Vincent P. Heuring and Harry F. Jordan, Computer Systems Design and Architecture,
R04 Daniel P. Siewiorek, C. Gordon Bell, and Allen Newell, Computer Structures: Principles and Examples, McGraw-Hill Book Company, 1982 ISBN 0 – 07 – 057302 – 6 R05 William Stallings, Reduced Instruction Set Computers, An IEEE Tutorial The Computer Society Press, IEEE Computer Society, Loc Vaqueros CA, 1986 IEEE Catalog Number 86 – 45871, ISBN 0 – 8186 – 0713 – 0 R06 William Stallings, Computer Organization and Architecture: Designing for Performance, Prentice Hall, 2010, ISBN 978 – 0 – 13 – 607373 – 4. R07. Encyclopedia Britannica, 1946. R08. The Oxford English Dictionary, Second Edition, Clarendon Press, Oxford (England),
R09. Paul E. Ceruzzi, Reckoners: The Prehistory of the Digital Computer, from Relays to the Stored Program Concept, 1935 – 1945, Greenwood Press, Westport Connecticut, 1983 ISBN 0 – 313 – 23382 – 9 R10. The Oxford English Dictionary, Oxford at the Clarendon Press, 1933. R11. Readings in Computer Architecture, edited by Mark D. Hill, Norman P. Jouppi, and
R12 Introduction to Minicomputer Networks, Digital Equipment Corporation, 1971 R13 PDP – 11 Peripherals and Interfacing Handbook, Digital Equipment Corporation,
R14 PDP – 11 Peripherals Handbook, Digital Equipment Corporation, 1976 R15 Andrew S. Tanenbaum, Structured Computer Organization, (Fifth Edition,
R16 Miles J. Murdocca and Vincent P. Heuring, Principles of Computer Architecture, Prentice-Hall, 2000. ISBN 0 – 201 – 43664 – 7. R46 C. J. Bashe, W. Buchholz, et. al., The Architecture of IBM’s Early Computers, IBM J. Research & Development, Vol. 25(5), pages 363 – 376, September 1981. R50 P. M. Davies, Readings in Microprogramming, IBM Systems Journal, 1972 (Number 1), pages 16 – 40. R51 S. G. Tucker, Microprogram Control for System/360, IBM Systems Journal, Volume 6, No. 4 (1967), pages 222 – 241. R56 Articles on pages 18 and 50 of Computerworld, February 20, 2006 R57 G. M. Amdahl, G. A. Blaauw, and F. P. Brooks, Architecture of the IBM|
R58 J. S. Liptay, Structural Aspects of the System/360 Model 85, Part II: The Cache, IBM Systems Journal, 7(1), 15 – 21, 1968, Reprinted in Readings in Computer Architecture, edited by Mark D. Hill [R11]. R60 John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kauffman Publishers, 1990. ISBN 1 – 55880 – 069 – 8 R61 S. Mazor, The History of the Microcomputer – Invention and Evolution, Proceedings of the IEEE, pp. 1601 – 1607, Dec. 1995. Reprinted in R11. R62 M.A. McCormack, T.T. Schansman, and K.K. Womack, "1401 Compatibility Feature on the IBM System/360 Model 30," Communications of the ACM, v. 8, n. 12, 1965, pp. 773-776. R63 S.G. Tucker, "Emulation of Large Systems," Communications of the ACM, v. 8, n. 12, 1965, pp. 753-761. R64 Doug Abbot, PCI Bus Demystified, Elsevier, 2004, ISBN 0 – 7506 – 7739 – 2. R65 Randal E. Bryant & David R. O’Hallaron, Computer Systems, A Programmer’s
R66 John D. Carpinelli, Computer Systems, Organization & Architecture, Addison Wesley Longman, 2001, ISBN 0 – 201 – 61253 – 4. R67 Carl Hamacher, Zvonko Vranesic, and Safwat Zaky; Computer Organization, McGraw Hill, 2002, ISBN 978 – 0 – 07 – 232086 – 2. R68 David B. Kirk & Wen–mei W. Hwu, Programming Massively Parallel Processors, Elsevier/Morgan Kaufmann, 2010, ISBN 978 – 0 –12 – 381472 – 2. R69 Betty Prince, High Performance Memories: New Architecture DRAMs and SRAMs Evolution and Function, John Wiley & Sons, 1999, ISBN 0 – 471 – 98610 – 0. R70 Tom Shanley & Don Anderson, ISA System Architecture, Addison–Wesley, 1995, ISBN 0 – 201 – 40996 – 8. R71 Ton Shanley & Don Anderson, PCI System Architecture, Addison–Wesley, 1999, ISBN 0 – 201 – 30974 – 2. R72 Sajjan G. Shiva, Computer Design & Architecture, Harper Collins, 1991, ISBN 0 – 673 – 39683 – 5. R73 Rob Williams, Computer Systems Architecture: A Networking Approach, Pearson/Prentice Hall, 2006, ISBN 0 – 32 – 134079 – 5. R78 Denning, P., “The Working Set Model for Program Behavior”, Communications of the ACM, May 1968. R79 Jonathan G. Koomey, Stephen Berard, Marla Sanchez, & Henry Wong; Assessing Trends in the Electrical Efficiency of Computation Over Time, Final Report to Microsoft Corporation and Intel Corporation, submitted to the IEEE Annals of the History of Computing on August 5, 2009. R80 David A. Patterson & John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann, 2005, ISBN 1 – 55860 – 604 – 1. R81 Katherine Yelick, Multicore: Fallout of a Hardware Revolution. R82 Tahir Ghani (Intel Fellow, Logic Technology Development), Challenges and
R84 Intel White Paper “Solving Power and Cooling Challenges for High Performance”, June 2006. R85 Geoff Koch, Intel’s Road to Multi–Core Chip Architecture, 2006. R91 The Datasheet (2gbddr2.pdf – Rev F 12/10 EN) for the Micron DDR2 Memory Chip
R98 C. D. Mee and E. D. Daniel, editors. 1996. Magnetic Recording Technology, McGraw–Hill, 1996. R99 Bruce Jacob, Spencer W. Ng, and David T. Wang, Memory Systems: Cache, DRAM, Disk, Elsevier/Morgan Kaufmann, 2008, ISBN 978 – 0 –12 – 379751 – 3. R102 Douglas E. Comer, Computer Networks and Internets with Internet Applications, Pearson/Prentice–Hall, 2004. ISBN 0 – 13 – 143351 – 2. R103 Douglas E. Comer and David L. Stevens, Internetworking with TCP/IP: Volume II (Design, Implementation, & Internals), Prentice–Hall, 1999. ISBN 0 – 13 – 973843 – 6. R104 David A. Patterson, Reduced Instruction Set Computers, Communications of the ACM, Volume 28, Number 1, 1985. Reprinted in IEEE Tutorial Reduced Instruction Set Computers [R05], edited by William Stallings, The Computer Science Press, 1986, ISBN 0–8181–0713–0. R106 Cray–1 Computer System Hardware Reference Manual Publication 2240004, Revision C, November, 1977. R107 R. M. Russell, The Cray–1 computer system, Communications of the ACM, 21(1):63–72, 1978. R108 Kai Hwang, Evolution of Modern Supercomputers, the introduction to Chapter 1 in the IEEE Tutorial Supercomputers: Design and Applications, 1984. ISBN 0 – 8186 – 0581 – 2. R109 Harold S. Stone, High–Performance Computer Architecture, Addison–Wesley (Third Edition), 1993. ISBN 0 – 201 – 52688 – 3. R110 John Paul Shen and Mikko H. Lipasti, Modern Processor Design: Fundamentals of Superscalar Processors, McGraw Hill, 2005. ISBN 0 – 07 – 057064 – 7. R111 W. A. Wulf and S. P. Harbison, Reflections in a pool of processors / An experience report on C.mmp/Hydra, Proceedings of the National Computer Conference (AFIPS), June 1978. R112 Robert J. Baron and Lee Higbie, Computer Architecture, Addison–Wesley Publishing Company, 1992, ISBN 0 – 201 – 50923 – 7. References to Web Sites R17. http://www.dcs.warwick.ac.uk/research/history/greenwich.html R18. http://www.cbi.umn.edu/collections/inv/cbi00162.html R19. http://www.ieee-virtual-museum.org/collection/people.php R20. http://www.gwu.edu/~cistp/PAGES/human.pdf R21. http://faculty.washington.edu/emer/sw/class1/sid003.htm R22. http://www.du.edu/~etuttle/electron/elect27.htm R23. http://mason.gmu.edu/~montecin/vacuum_tube.html R24. http://uwacadweb.uwyo.edu/numimage/currency.htm R25 http://www.fourmilab.ch/babbage/sketch.html R26 http://www.agnesscott.edu/lriddle/women/love.htm R27 http://www.kerryr.net/pioneers/stibitz.htm R28 http://www.history.navy.mil/photos/images/h96000/h96566kc.htm R29 http://www.yorku.ca/sasit/sts/sts3700b/lecture17a.html R30 http://ei.cs.vt.edu/~history/Zuse.html R31 http://faculty.washington.edu/emer/sw/class1/sid008.htm R32 http://ei.cs.vt.edu/~history/do_Atanasoff.html R33 http://www.cs.virginia.edu/brochure/museum.html R34 http://ei.cs.vt.edu/~history/ENIAC.Richey.html R35 http://www.ee.upenn.edu/~jan/eniacproj.html R36 http://www.columbia.edu/acis/history/plugboard.html R37 http://ftp.arl.mil/~mike/comphist//61ordnance/chap3.html R38 http:/www.cl.cam.ac.uk/Relics/jpegs/edsac99.4.jpg R39 http:/www.cl.cam.ac.uk/Relics/jpegs/edsac99.9.jpg R40 http://www.cs.sun.ac.za/~museum/memory.html R41 http://www.columbia.edu/acis/history/650.html R42. http://www.pdp8.net/r-boards/pics/r205.shtml R43 http://www.computer50.org/mark1/new.baby.html R44 http://www.computer50.org/mark1/MM1.html R45 http://www-03.ibm.com/ibm/history/exhibits/650/650_intro2.html R47 http://www.columbia.edu/acis/history/generations.html R48 http://www-03.ibm.com/ibm/history/exhibits/mainframe/mainframe_intro.html R49 http://en.wikipedia.org/wiki/IBM_360 R52 http://en.wikipedia.org/wiki/List_of_Intel_microprocessors R53 http://en.wikipedia.org/wiki/Photolithography R54 http://www.cray.com/about_cray/history.html R55 http://www.columbia.edu/acis/history/ R59 http://www.webmythology.com/VAXhistory.htm R74 "Memory Prices (1957-2004)" http://www.jcmit.com/memoryprice.htm R75 Shehzaad Kaka (National Institute of Standards and Technology): Past, Present, and Future of MRAM, presented at the THIC meeting on July 22 – 23, 2003 at Louisville, Colorado. Web link: http://www.thic.org/pdf/Jul03/nist.skaka.030722.pdf According to its web site (http://www.thic.org/), “THIC, the Premier Advanced Storage Technology Forum, is a not–for–profit corporation registered in … Illinois.” R76 http://www.mram-info.com/ R77 David Patterson, EECS 252 Graduate Computer Architecture (Lecture 4 – Memory
R83 http://www.cray.com/Assets/PDF/products/xk/CrayXK6Brochure.pdf R86 http://en.wikipedia.org/wiki/Multi-core_processor R87 http://www.pcper.com/reviews/Processors/Intel-Shows-48-core-x86-Processor- Single-chip-Cloud-Computer?aid=825 R88 http://techfreep.com/intel-80-cores-by-2011.htm R89 http://www.micron.com/partscatalog.html?
R90 http://en.wikipedia.org/wiki/Prefetch_buffer, accessed July 3, 2011. R92 http://en.wikipedia.org/wiki/Micro_Channel_architecture, accessed July 4, 2011. R93 http://en.wikipedia.org/wiki/PCI_Express, November 1, 2010 R94 http://en.wikipedia.org/wiki/File:Differential_Signaling.png, November 1, 2010 R95 http://www.interfacebus.com/Design_Connector_RS422.html,November 1, 2010 R96 http://en.wikipedia.org/wiki/RS-422, November 1, 2010 R97 http://en.wikipedia.org/wiki/Serial_ATA, accessed July 5, 2011. R100 http://www-03.ibm.com/ibm/history/exhibits/storage/storage_350.html, accessed July 7, 2011. R101 http://www.programmerfish.com/from-10m-to-1gb-cost-of-memory-over-the-years, accessed June 28, 2011. R105 http://en.wikipedia.org/wiki/MIPS_architecture, accessed July 11, 2011. R113 http://www.nvidia.com, accessed July 12, 2011. R114 http://www.dell.com, accessed July 12, 2011. R115 http://www.nccs.gov/jaguar/, accessed July 12, 2011. Page Directory: My5155Text V07 DOC My5155Text V07 DOC -> Chapter 6 – More Combinational Circuits My5155Text V07 DOC -> Chapter 9 – Memory Organization and Addressing We now give an overview of ram – Random Access M My5155Text V07 DOC -> Cpu central P My5155Text V07 DOC -> Chapter 4 – Boolean Algebra and Some Combinational Circuits Download 15.33 Kb. Share with your friends:
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