Doc: ps2001-5-1101-001 Rev: R02. 00



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PS2001-5-1101-001-URS
1486357009-URS, URS
4.8.3
Internal memory bits
(1) Internal memory bits
will
only be used to store the global, common signals that are available to all modules (i.e. true/false signals, timing signals, first cycle signals c.
(2) Other internal areas such as timers and counters
shall
not be used, alternative mechanisms
shall
be devised that are less restricted (e.g. using and counting timing pulses. Instance data blocks are retentive data areas assigned specifically to function blocks

Doc PS Rev Rb
Parameters
(1) All standard modules
will
receive all the data they require via parameters direct addressing of system areas from within the standard modules
will
not be permitted.
(2) Application modules are project specific and are used to structure and coordinate the control system software, such modules
shall
not generally use parameters and direct addressing of system areas from within the application modules
shall
be permitted.
(3) The use of parameters
will
be standardised, a common approach to the handling of parameters
will
be established, such that all module parameters have a consistent and familiar mechanism for passing data.
(4) Where a standard module uses a system block that requires an instance data block (an example would be the system PID control block, this requires its own iDB), the instance data block address
will
be a parameter to the standard module, this will be passed internally by the standard module to the system block as a pointer or other indirect reference (i.e. the standard modules will not have any hardcoded instance data block references.
4.8.5
Global data
(1) Various global signals
will
be required by the software modules that form the library this will include but not be limited to
• Global logic signals (true, false)
• Various timing pulses and square wave signals
• Cyclically dependent signals (first cycle c)
(2) The Controller CPUs are equipped with an internal function to generate accurate square waves ranging from 0.5 Hz to 10 Hz, this is referred to as the clock memory. The clock memory
may
be used as part of the global data generation.


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Nomenclature
(1) A comprehensive naming mechanism will be established to give a common approach to the naming of the following
• Module names
• Module parameters
• Local (temporary) data
Constants
• IO symbols
• Tagging conventions
• Variable names within different types of UDT
• Variable names within data blocks
(2) The Style Guide (§ 4.6.5),
will
contain details of all naming conventions.

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