Chapter 1 Basic Principles of Digital Systems outlin e 1
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A P P E N D I X E • EPROM Data for a Digitial Function Generator 771 /* Hex file is written to c:\eprom\eprom.hex * To change the file name, modify the following line to: * if (!(fp = fopen(“c:\\YourDirectoryName\\YourFile.hex”, “w+t”))) { */
printf(“Error opening output file.\r\n”); exit(1);
} else printf(“File opened successfully. \r\n”); while (Fcn != 5) { /* Create records for 4 functions */ /* Each function has 16 lines of data */ for (Linenum = 1; Linenum <= 16; Linenum++) { /* Create record and address information */ if (Addr < 16) sprintf(Record, “:10000%x”, Addr); else if (Addr < 256) sprintf(Record, “:1000%x”, Addr); else
sprintf(Record, “:100%x”, Addr); strcat(Record, “00”); /* Accumulate sum for calculating checksum */ sum = 16 + AddrByte(Addr); /* Calculate byte values for selected function */ for (Byte = 1; Byte <= 16; Byte++) { if (Fcn == 1) sine(Addr % 256); else if (Fcn == 2) Square(Addr % 256); else if (Fcn == 3) triangle(Addr % 256); else Sawtooth(Addr % 256); /* Append calculated byte value (amplitude) to the record and update checksum accumulator */ strcat (Record, HexString(Ampl)); sum = sum + Ampl; Addr++; }
fprintf(fp, “%s\r\n”, Record); } Fcn++; } fprintf(fp, “:00000001FF\r\n”); fclose(fp); return(0); }
int AddrByte(int Addr) { if (Addr < 256) return Addr; else
return (((int)(Addr / 256)) + (Addr % 256)); } int Chksum(int sum) { int IntRem = sum % 256; if (IntRem == 0) return 0; else return (256 - IntRem); } char *HexString(int value) { if (value < 16) { sprintf(Hex, “0%x”, value); return Hex; } else if (value > 255) return “FF”; else { sprintf(Hex, “%x”, value); return Hex; } } void Sawtooth(int Addr) { Ampl = Addr; return; } void sine(int Addr) { double angle = ((((float)Addr) * 2 * Pi) / 256); Ampl = ((int)((sin(angle) * 128) + 128)); if (Ampl > 255) Ampl = 255; return;
} void Square(int Addr) { if (Addr < 128) Ampl = 255; else
Ampl = 0; return;
} A P P E N D I X E • EPROM Data for a Digitial Function Generator 773 void triangle(int Addr) { if (Addr < 64) Ampl = 128 + (2 * Addr); else if ((Addr >= 64) && (Addr < 192)) Ampl = 256 - 2 * (Addr - 63); else
Ampl = 2 * (Addr - 191); return;
} E.3 Resultant Record File :10000000808386898C8F9295989C9FA2A5A8ABAE81 :10001000B0B3B6B9BCBFC1C4C7C9CCCED1D3D5D893 :10002000DADCDEE0E2E4E6E8EAECEDEFF0F2F3F54C :10003000F6F7F8F9FAFBFCFCFDFEFEFFFFFFFFFF01 :10004000FFFFFFFFFFFFFEFEFDFCFCFBFAF9F8F7E8 :10005000F6F5F3F2F0EFEDECEAE8E6E4E2E0DEDC00 :10006000DAD8D5D3D1CECCC9C7C4C1BFBCB9B6B319 :10007000B0AEABA8A5A29F9C9895928F8C898683E1 :100080007F7C797673706D6A6763605D5A575451EF :100090004F4C494643403E3B383633312E2C2A27BD :1000A0002523211F1D1B1917151312100F0D0C0AE4 :1000B000090807060504030302010100000000000F :1000C0000000000000000101020303040506070808 :1000D000090A0C0D0F1012131517191B1D1F2123D0 :1000E00025272A2C2E313336383B3E404346494C97 :1000F0004F5154575A5D6063676A6D707376797CAF :10010000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF :10011000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEF :10012000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDF :10013000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFCF :10014000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFBF :10015000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFAF :10016000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF9F :10017000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF8F :10018000000000000000000000000000000000006F :10019000000000000000000000000000000000005F :1001A000000000000000000000000000000000004F :1001B000000000000000000000000000000000003F :1001C000000000000000000000000000000000002F :1001D000000000000000000000000000000000001F :1001E000000000000000000000000000000000000F :1001F00000000000000000000000000000000000FF :1002000080828486888A8C8E90929496989A9C9EFE :10021000A0A2A4A6A8AAACAEB0B2B4B6B8BABCBEEE :10022000C0C2C4C6C8CACCCED0D2D4D6D8DADCDEDE :10023000E0E2E4E6E8EAECEEF0F2F4F6F8FAFCFECE :10024000FEFCFAF8F6F4F2F0EEECEAE8E6E4E2E0BE :10025000DEDCDAD8D6D4D2D0CECCCAC8C6C4C2C0AE :10026000BEBCBAB8B6B4B2B0AEACAAA8A6A4A2A09E :100270009E9C9A98969492908E8C8A88868482808E :100280007E7C7A78767472706E6C6A68666462607E 774 A P P E N D I X E • EPROM Data for a Digital Function Generator :100290005E5C5A58565452504E4C4A48464442406E :1002A0003E3C3A38363432302E2C2A28262422205E :1002B0001E1C1A18161412100E0C0A08060402004E :1002C000020406080A0C0E10121416181A1C1E201E :1002D000222426282A2C2E30323436383A3C3E400E :1002E000424446484A4C4E50525456585A5C5E60FE :1002F000626466686A6C6E70727476787A7C7E80EE :10030000000102030405060708090A0B0C0D0E0F75 :10031000101112131415161718191A1B1C1D1E1F65 :10032000202122232425262728292A2B2C2D2E2F55 :10033000303132333435363738393A3B3C3D3E3F45 :10034000404142434445464748494A4B4C4D4E4F35 :10035000505152535455565758595A5B5C5D5E5F25 :10036000606162636465666768696A6B6C6D6E6F15 :10037000707172737475767778797A7B7C7D7E7F05 :10038000808182838485868788898A8B8C8D8E8FF5 :10039000909192939495969798999A9B9C9D9E9FE5 :1003A000A0A1A2A3A4A5A6A7A8A9AAABACADAEAFD5 :1003B000B0B1B2B3B4B5B6B7B8B9BABBBCBDBEBFC5 :1003C000C0C1C2C3C4C5C6C7C8C9CACBCCCDCECFB5 :1003D000D0D1D2D3D4D5D6D7D8D9DADBDCDDDEDFA5 :1003E000E0E1E2E3E4E5E6E7E8E9EAEBECEDEEEF95 :1003F000F0F1F2F3F4F5F6F7F8F9FAFBFCFDFEFF85 :00000001FF
Answers to SelectedOdd-NumberedProblems Chapter 1 1.1 Analog quantities: a. Water temperature at the beach; b. weight of a bucket of sand; e. height of a wave; Digital quantities: c. grains of sand in a bucket; d. waves hitting the beach in one hour; f. people in a square mile. Generally, any quantity that can be expressed as “the number of. . .” is digital.
A01, A02, A03 1.17 a. 2C5; b. 761; c. FFF; d. 1000; e. 2790; f. 7D00; g. 8000 1.19 a. 5E86; b. B6A; c. C5B; d. 6BC4; e. 15785; f. 198B7; g. 28000 1.21 Periodic: b., c., e. Each of these waveforms repeats itself in a fixed period of time. (Note that waveform b. may not immediately appear to be periodic. However, if we count the sequence of short pulse, short space, medium pulse, medium space, short pulse, long space, we will find that each repetition of this sequence takes the same time.)
repeats in a fixed period of time. Waveform a. has three equally-spaced pulses of equal width, but this pattern does not repeat in the time shown. Waveform d. has pulses of equal duration, spaced at increasing (i.e. unequal) intervals. 1.23 From the graph in Figure 1.14, read the times corresponding to the 10%, 50%, and 90% values of the pulse on both leading and trailing edges.
50%: 7.5 s 50%: 45 s 90%: 10 s 10%: 50 s
edge.
tw _ 45 s _ 7.5 s _ 37.5 s Rise time: 10% of rising edge to 90% of rising edge. tr _ 10 s _ 5 s _ 5 s Fall time: 90% of falling edge to 10% of falling edge. tf _ 50 s _ 40 s _ 10 s Chapter 2 2.1 See Figure ANS2.1. A
A 1
Y _ A FIGURE ANS2.1 776 Answers to Selected Odd-Numbered Problems 2.5 N is HIGH if J OR K OR L OR M IS HIGH. See Table ANS2.5.
2.3 See Figure ANS2.3. 2.13 See Figure ANS2.13. Table ANS2.5 4-input OR Truth Table J K L M N 0 0 0 0 0 0 0 0 1 1 * 0 0 1 0 1 * 0 0 1 1 1 * 0 1 0 0 1 * 0 1 0 1 1 * 0 1 1 0 1 * 0 1 1 1 1 * 1 0 0 0 1 * 1 0 0 1 1 * 1 0 1 0 1 * 1 0 1 1 1 * 1 1 0 0 1 * 1 1 0 1 1 * 1 1 1 0 1 * 1 1 1 1 1 *
NOR Truth Table A B C D Y 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 0 B A C D
2.7 The switches must be connected in parallel. See Figure ANS2.7.
470 _ +5V
FIGURE ANS2.13 2.15 a. Output Y is LOW when A OR B OR C OR D are HIGH. The truth table is shown in Table ANS2.15. a. Distinctive Shape b. Rectangular Outline Y AB CD _ 1
Y _ A _ B _ C _ D AB CD FIGURE ANS2.15 b. Y _ A_____B_____C_____D_ c. See Figure ANS2.15 a. Distinctive Shape b. Rectangular Outline AB C AB C Y _ A _ B _ C Y _ A _ B _ C _1
2.9 Active LOW. When the switch is pressed, it generates a logic LOW. 2.11 The anode must be at a higher voltage than the cathode by a specified amount. 2.17 Output Y is LOW if inputs A AND B AND C AND D AND E are all HIGH. Answers to Selected Odd-Numbered Problems 777
A B AND OR NAND NOR XOR
XNOR FIGURE ANS2.27 A B Y FIGURE ANS2.29 2.29 See Figure ANS2.29. 2.31 A HIGH is required to enable the AND gate. This allows the lamp to flash. 2.33 No. An XOR gate has no inhibit state. The lamp always flashes.
Chapter 3 3.1 a. Y _ ABC; b. X _ PQ _ RS; c. M _ HJKL; d. A _ W _ X _ Y _ Z; e. Y _ (A _ B)(C _ D); f. Y _ (_A_____B_)_(_C_____D_)_; g. Y _ (A_ _ B_)(C_ _ D_); h. X _ P_ Q_ _ R_ S_; i. X _ P_ Q_ _ R_ S_ 2.25 a. and c. The attributes of shape, input level, and output level are all different between these two symbols. 2.27 See Figure ANS2.27. 2.35 Transistor-Transistor Logic (TTL) and Complementary Metal-Oxide-Semiconductor (CMOS). Typically, TTL can drive higher-current loads. CMOS has more flexible power supply requirements and uses less power. 2.37 Low power Schottky TTL: 74LS02; CMOS: 4001B; High-speed CMOS: 74HC02. NANDs and NORs are differentiated by the last two digits in their part numbers. a. X T U V W i. Y A B C e. Y A B C h. Y A B C j. Y A B C D f. Y A B C FIGURE ANS3.3 778 Answers to Selected Odd-Numbered Problems Y D3 D2 D1 D3D2D1 D0 D3D1D0 D3D2D0 D2D1D0
FIGURE ANS3.5 3.3 See Figure ANS3.3. Boolean expressions: a. X _ T_ _ U_ _V _W_; e. Y _AB_AC; f. Y_(A_B)(A_C); h. Y _A_ B_ _ B_ C_ _A C; i. Y _ (A _ B) _ (B _ C) _ (A_ _ C_) _ 1; j. Y _ (A _ B _ C _ D)ABC_ _ABC_ 3.5 Y _ D_3D2D1D0 _ D3D_2D1D0 _ D3D2D_1D0 _ D3D2D1D_0 for a circuit that indicates that exactly three inputs are HIGH. If at least three inputs are HIGH, the equation simplifies to Y _ D2D1D0 _ D3D1D0 _ D3D2D0 _ D3D2D1. The latter circuit is shown in Figure ANS3.5.
3.7 e. Y _ (A_ _ C_) _ B_ C_; f. Y _AB_C _ C; g. (A_BD)(B _ C_) _A_ C_; h. Y _ (A_B)(A_C)(BC); i. Y _ (A _ B_) _ (A_ C)(BC) All of the above equations could be simplified further with Boolean algebra. Answers to Selected Odd-Numbered Problems 779 i. 3.9 a. T U V W X 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 0 1 1 1 0 1 1 1 1 1 1
0 0 0 0
0 0 1 0 0 1 0 1
0 1 1 1 1 0 0 0
1 0 1 0 1 1 0 1
1 1 1 0 A B C Y 0 0 0 1
0 0 1 1 0 1 0 1
0 1 1 1 1 0 0 1
1 0 1 1 1 1 0 1
1 1 1 1 j. 3.11 SOP: Y _A_ B_ C_ _A_ B_ C _A_ B C_ _A_ B C POS: Y _ (A_ _ B _ C)(A_ _ B _ C_)(A_ _ B_ _ C) (A_ _ B_ _ C_) See Figure ANS3.11 A B C D Y 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 1 1 1 0 1 0 1 1 1 0 1 1 1 1 1 0 Y (SOP)
Y (POS) A B C
FIGURE ANS3.11 h. 780 Answers to Selected Odd-Numbered Problems 3.15 Y _ (A _ B)(A_ _ B_) See Figure ANS3.15. 3.29 Y _A_ B_ C_ D _A B_ C_ D_ _ BC 3.31 Y _A_ B_ C_ _A B C_ _A_ B_ D _A D_ See Figure ANS3.31. 3.33 Y _A_ B _ CD See Figure ANS3.33. CD AB ABC ABC ABD
AD 01 00 10 1 1 1 0
0 0 0 0 1 1 0 1
1 0 0 1 00 01 11
11 10
CD AB
CD 01 00 10 0 0 1 0
1 1 1 1 0 0 1 0
0 0 1 0 00 01 11
11 10
CD AB BC
AD 01 00 10 0 0 1 1
0 0 0 0 X X X X
0 1 X X 00 01 11
11 10
A B C Y
3.13 SOP: Y _A_ B_ C _A_ B C_ _A B_ C _A B C_ _A B C POS: Y _ (A _ B _ C)(A _ B_ _ C_)(A_ _ B _ C) See Figure ANS3.13
A B
Y _(A _ B)(A _ B) FIGURE ANS3.15 3.17 Y _ (A _ B _ C)D_ _AD_ _ BD_ _ CD_ 3.19 a. Y _AB _ C; b. Y _ C; c. J _ K; d. S _ 0; e. S _ T; f. Y _ B C_ D_ _A B_ F _ C_ F 3.21 a. Y _A_ _ B_; b. Y _ C D _ C_ D_ _A B; c. K _ M_N _ ML 3.23 SOP: Y _A_ C_ _ B C_; POS: Y _ (A_ _ B)C_ 3.25 Y _AD _ BC_ 3.27 Y _A_D _ C_D _ BCD_ Answers to Selected Odd-Numbered Problems 781 CD AB
CD ABCD
01 00 10 0 1 1 0 0 1 1 0
0 0 1 0 1 0 1 0
00 01 11 11 10 FIGURE ANS3.37. CD AB ABCD AB BD 01 00 10 0 0 0 0 1 1 1 1
1 0 0 1 0 1 0 0
00 01 11 11 10 FIGURE ANS3.39 CD AB D 01 00 10 0 1 1 0
0 1 1 0 0 1 1 0
0 1 1 0 00 01 11
11 10
CD AB
00 10 0 0 0 0 0 0 1 0 1 1 1 0
1 1 1 1 00 01 11
11 10 AB
BCD AC
CD AB
00 10 1 0 0 0 1 1 0 0 0 0 1 1
0 0 1 1 00 01 11
11 10 (A _ C) (A _ C) (A _ B _ D) a. K-map b. Circuit Y A B C D FIGURE ANS3.45 3.39 Y _AB_ C_D _A_B _ BD_. See Figure ANS3.39. 3.41 Y _ D. See Figure ANS3.41. 3.43 Y _AC_ _AB_ _ BCD. See Figure ANS3.43. 3.45 Y _ (A_ _ C)(A _ C_)(A _ B _ D_). See Figure ANS3.45.
782 Answers to Selected Odd-Numbered Problems 3.47 E4 _ D4D_2 _ D3D1 _ D3D2 E3 _ D_3D2 _ D_3D1 _ D3D_2D_1 E2 _ D_2D_1 _ D2 D1 E1 _ D_1
See Figure ANS3.47. Chapter 4 4.1 Advantages of programmable logic: User is not restricted to standard digital functions from a device manufacturer; only required functions need be implemented; package count can be reduced; design can be reprogrammed or reconfigured without changing the circuit board.
Logic); EPLD (Erasable Programmable Logic Device); FPGA (Field-Programmable Gate Array)
information, such as a schematic or text in a hardware description language.A project is a collection of files associated with a design entered in MAX_PLUS II. 4.7 Primitives—Basic functional blocks, such as logic gates, used in PLD design files. Instance—A single copy of a component in a PLD design file. 4.9 The gdf for the 4-channel demultiplexer circuit is shown in Figure ANS4.9. 4.11 The gdf for the half adder is shown in Figure ANS4.11a. The default symbol for the half adder is shown in Figure ANS4.11b.
in Figure ANS4.13 4.15 AHDL—Altera Hardware Description Language VHDL—VHSIC Hardware Description Language VHSIC—Very High Speed Integrated Circuit 4.17 The two minimum VHDL structures are an entity declaration and an architecture body. The entity describes the input and output terminals of the design. The architecture defines the relationship between the inputs, outputs, and internal signals of the design.
only. A port of mode BUFFER is an output that can also be fed back into the design entity for use by other functions within the entity. D2 D1 E4
01 00 10 0 0 0 0 0 1 1 1
X X X X 1 1 X X
00 01 11 11 10 D2 D1 E2 D4 D3 01 00 10 1 0 1 0 1 0 1 0
X X X X 1 0 X X
00 01 11 11 10 D2 D1 E3 D4 D3 01 00 10 0 1 1 1 1 0 0 0
X X X X 0 1 X X
00 01 11 11 10 D2 D1 E1 D4 D3 01 00 10 1 0 0 1 1 0 0 1
X X X X 1 0 X X
00 01 11 11 10 E4 E3 E2 E1 D4 D3 D2 D1 FIGURE ANS3.47 Answers to Selected Odd-Numbered Problems 783 NOT AND3
Y0 OUTPUT
AND3 Y2 OUTPUT AND3 Y3 OUTPUT D INPUT
VCC VCC
VCC S1 INPUT S0 INPUT
22 23 24 25 14 19 20 NOT 21
8 7 AND3 Y1 OUTPUT
AND2 SUM
OUTPUT XOR
CARRY halfadd
B INPUT VCC
VCC A INPUT 1 2 A B
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