Advanced Configuration and Power Interface Specification Hewlett-Packard Corporation
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NoOp Code (No Operation) 622 NOr (Integer Bitwise Nor) 622 Not (Integer Bitwise Not) 622 Nothing 532 notification battery removal 385 temperature changes 411 Notify (Notify Object of Event) 623 numeric constants, notation 532 NVS files checking validity 494 NVS memory 492 object name, definition 35 Object Reference data type, ASL 559, 563 objects control methods 161 definition 35 device configuration 207 device identification 196 device-specific 334 global scope 159 Notify operator 175 reserved and predefined 183 thermal management 420 _ BMC (Battery Maintenance Control) 397 _ADR (Address) 197 _ALx (Active List) 422 _BBN (Base Bus Number) 279 _BCT (Battery Charge Time) 395 _BIF (Battery Information) 387 _BIX (Battery Information Extended) 389 _BMA (Battery Measurement Averaging Interval) 392 _BMD (Battery Maintenance Data) 395 _BMS (Battery Measurement Sampling Time) 392 _BST (Battery Status) 393 _BTM (Battery Time) 394 _BTP (Battery Trip Point) 394 _CID (Compatible ID) 198 _CRS (Current Resource Settings) 209, 365 _CRT (Critical Temperature) 425 _DDN (Device Name 198 _DIS (Disable) 209 _DMA (Direct Memory Access) 209 _EDL (Eject Device List) 241 _EJD (Ejection Dependent Device) 241 _EJx (Eject) 243 _FDE (Floppy Disk Enumerate) 349 _FDI (Floppy DIsk Information) 350 _FIX (Fixed Register Resource Provider) 212 _HID (hardware ID) 199, 382 _HOT (Hot Temperature) 425 _HPP (Hot Plug Parameters) 214, 217, 219 _INI (Init) 276 _IRC (In Rush Current) 291 _LCK (Lock) 243 _MAT (Multiple APIC Table Entry) 221 _NTT (Notification Temperature Threshold) 425 _PCL (Power Consumer List) 399 _PCT (Performance Control) 326 _PPC (Performance Present Capabilities) 327 _PR1 (Power Resources for D1) 289 _PRS (Possible Resource Settings) 232 _PRT (PCI Routing Table) 232 _PSL (Passive List) 426 _PSS (Performance Supported States) 317, 322, 326, 329 _PSV (Passive) 426 _PTC (Processor Throttling Control) 319 _PXM (Proximity) 208, 234 _RMV (Remove) 248 _S1D 292
_S4D 294 _SBS (Smart Battery Subsystem) 382 _SEG (Segment) 279 _SRS (Set Resource Settings) 239 _STA (Status) 248, 285 _STR (String) 206 _SUN (Slot User Number) 207 _TC1 (Thermal Constant 1) 429 _TSP (Thermal Sampling Period) 431 _TZD (Thermal Zone Devices) 432 _TZP (Thermal Zone Polling) 341, 358, 371, 374, 432 _UID (Unique ID) 207 ObjectType (Get Object Type) 623 OEM implementation 23 One (Constant One Object) 624 Ones (Constant Ones Object) 624 Operating System-directed Power Management 35 Operation Region data type, ASL 559, 563 Operation Region Field Unit data type, ASL 559, 563 operation regions IPMI 165 SMBus 465 OperationRegion (Declare Operation Region) 163, 624 OperationRegion term access types 601 operators, ASL 559 Or (Integer Bitwise Or) 626 original equipment manufacturer 23 OS AML support, required 531 compatibility requirements 29 defined object names 191 device power management 49 drivers, embedded controller interface 442 functional fixed hardware implementation 64 independent generic hardware 65 loading 494 name object 194 S4 Sleeping state transition 487 OSPM
cooling policy changes 409 device insertion and removal 239 event handlers 70 exclusive controls 45 fixed hardware registers 87 functions 44 general-event register access 96 generic hardware model 65 goals 21 hardware model 67 implementation requirements 28 passive cooling 412 power management vs. performance 283 Real Time Clock Alarm (RTC) 84 SMBus registration 465 thermal management 407 output devices definition 695 switching 707 types of 697 P_LVL2 93 P_LVL3 94 P0 performance state, definition 42 P1 performance state, definition 42 Package (Declare Package Object) 626 Package data type, ASL 559, 563 packages definition 35 length 159 length encoding, AML 655 nested 605 parentheses, AML notation 653 passive cooling definition 62, 408 processor clock throttling 412 PC Card controllers, power management 672, 689 PC keyboard controllers 442 PCI
buses, address space translation 105 IRQ routing 234 power management 671 BAR target operations 164 PCI configuration space 70 PCI Interrupt Link device 181 PEC (packet error checking) 452, 463 performance states device 55 phones, answering waking computer 54 PIC method 195 pins general event model 56 GPE 96 platform implementation 25 Platform Interrupt Source structure 141, 143 Plug and Play devices ACPI control 55 IDs 196 large resource items 255 resource control method 207 small resource items 249 specifications 31 PM timer register address 76 register blocks 77 PM1 Control registers addresses 76 bits 91 blocks 77 grouping 75, 90 PM1 Enable registers 89 PM1 Event registers addresses 76 blocks 77 grouping 75, 87 PM1 Status registers 87 addresses 76 bits 92
blocks 77 PM2 Controller register grouping 75 PMIs 141 Pn performance state, definition 42 Polarity flags 138 policy owner 670 polling, thermal 410, 411 power button control methods 80 definition 35 device ID 181 fixed hardware 80 functions 47 object notification values 178 override 81, 84 single-button model 79 power consumption device and processor performance states 42 power management cooling, relationship to 62 definition 36 device 48 device objects 285 goals 22
legacy 70 performance vs. energy conservation 283 Plug and Play devices 55 processor 54 standards 48 power management (PM) timer bits 92 idle time, determining 55 operations 78 Power Resource data type, ASL 559, 563 power resources battery management 379 child objects 284 definition 36 device objects 288 devices, turning off 50 objects 283 shared 54 wake system object 290 Power Source (_PSR) object 398 power sources AC adapter 398 definition 36 object notification values 177, 179 power states controlled by OSPM 45 user-visible 45 PowerResource (Declare Power Resource) 627 preferred PM profile system 123 Processor (Declare Processor) 627 processor control block 78 processor control registers addresses 76 bits 93
Processor data type, ASL 559, 563 processor device notification values 178, 179 Processor devices 182 Processor Local APIC 136, 139, 156 Processor Local SAPIC 140 processor LVL2 register 93, 307 processor LVL3 register 94 processor objects 312 processor register block 93 programming models feature summary 72 protocols SMBus 469 PSDT 133
PWRBTN_EN 90 PWRBTN_STS 88 Query Embedded Controller (QR_EC) 448 Query System Address Map function 479 query value, definition 66 QWORD resource descriptor format 260, 629, 631, 632 Read Embedded Controller (RD_EC) 447 Real Time Clock Alarm (RTC) 84 reclaim memory 492 RefOf (Create Object Reference) 632 Region (_REG) control method 277 register bits, notation 67 register definitions, hardware 64 register groupings definition 36, 74 list of 75 registers control 73 EC-SMB-HC 451 embedded controller interface 445 fixed hardware 87 status/enable 73 related device interference 71 Release (Release a Mutex Synchronization Object) 633 Remaining Battery Percentage 58 reserved bits definition 36 PM1 Control registers 91 PM1 Enable registers 90 PM1 Status register 88, 89 software requirements 106 Reset (Reset an Event Synchronization Object) 633 reset register 94 resource data types Address Space Resource Descriptors 259 control methods 249 end tag 254 large 254 large vendor defined 257 small vendor defined 254 vendor defined 257 ResourceTemplate Resource To Buffer Conversion Macro) 634 Return (Return from Method Execution) 634 Revision (Constant Revision Object) 634 revision data object 195 RISC processors 259 RSDP definition 36 location 108 table structure 109 RSDT definition 36 location 103 table fields 113 RTC_EN 90 RTC_STS 89 S0 State (Working) 299 S1 Sleeping state behavior during 299 definition 41 implementation 485 transitioning 297 behavior during 299 definition 41 implementation 485 _S2D object 292 S3 Sleeping state behavior during 300 definition 41 implementation 486 _S3D object 293 S4 Sleeping state behavior during 300 definition 41 implementation 486 low-level battery 59 waking using RTC 84 S5 Soft-Off behavior during 301, 487 definition 41 transitioning to 488 SAPIC local 35
SATA controller device 348 saving system context during emergency shutdown 61 SBST 146 SCI
battery status information 50 definition 37 embedded controller events 449 enable bits 51 SCI_EN 86, 87, 91 Scope (Open Named Scope) 634 Serialized methods 603, 619 server machines, power management 47 Set Power State 50 shared interface, embedded controller 445 ShiftLeft (Integer Shift Left) 635 ShiftRight (Integer Shift Right) 636 Signal (Signal a Synchronization Event) 636 signatures collisions, avoiding 111, 112 interpreting 104, 113 values, storing 106 Simple Boot Flag Specification, Microsoft 112 single quotes AML notation 652 ASL notation 533 single-button model 79 SizeOf (Get Data Object Size) 636 slave addresses, SMBus 463 Sleep (Milliseconds Sleep) 636 sleep button definition 36 device ID 181 object notification values 178 support 81 Sleeping states button logic 82 definitions 38 entering 484 logic controlling 83 objects 292 packages, system state 297 properties 38 transitioning 297 transitioning to 483 SLP_EN 91 SLP_TYPx 91 SLP_TYPx field 74, 83 SLPBTN_EN 90 SLPBTN_STS 88 small resource data type 249 Smart Batteries definition 36 device ID 181 multiple battery subsystem 384 objects 382 single battery subsystem 383 SMBus devices 466 status notification 381 subsystem 57, 379 table 36
table formats 146 Smart Battery Charger functions 381 status notification 381 Smart Battery Selector 382 Smart Battery System Manager functions 380 status notification 382 SMB-HC 380, 384, 458 SMBus
address register (SMB_ADDR) 453 address space 462 alarm address register (SMB_ALRM_ADDR) 454 alarm data register (SMB_ALRM_DATA) 454 block count register (SMB_BCNT) 454 Block Write-Read Block Process Call (SMBBlockProcessCall) protocol 473 command register (SMB_CMD) 453 commands, restricted 460 data buffers 468 data register array (SMB_DATA) 454 definition 36 device ID 181 embedded controller interface 451 fields, declaring 466 generic hardware addresses 70 host controller notification header (OS_SMB_EVT) 448 host controller objects, declaring 464 interface 37 operation regions 462 Process Call (SMBProcessCall) protocol 472 protocol register (SMB_PRTCL) 452 protocols 455, 463 Read/Write Block (SMBBlock) protocol 472 Read/Write Byte (SMBByte) protocol 470 Read/Write Quick (SMBQuick) 469 Read/Write Word (SMBWord) protocol 471 Send/Receive Byte (SMBSendReceive) protocol 470 slave addresses 380 specifications 32 status codes 464 virtual registers 464 SMBus devices 182 SMI definition 37 embedded controller firmware 448 event flags (SMI_EVT) 446 interrupt events 69 Soft-Off definition 37 properties 38 transitioning to 68 SOHO servers 124 SSDT 36, 133 Stall (Stall for a Short Time) 637 Start Dependent functions resource descriptor format 251 statements If 592 Power Resource 283 statements, ASL 532 status register 56 sticky status bit, definition 66 storage devices, power management 672, 692 Store (Store an Object) 638 Streamlined Advanced Programmable Interrupt Controller 37 String data type, ASL 559, 563 strings, ASL 555 Subtract (Integer Subtract) 639 Switch (Select Code To Execute Based On Expression) 639 syntax OperationRegion 166, 465 syntax, ASL 531 system context definition 37 system indicators 334 system memory space 70 tables
address format 107 compatibility 107 headers 103 overview 103 SBST (Smart Battery Description) 146 temperature changes, detecting 410 Term Objects encoding, AML 655 terminology device power states 40 general 32 global system states 37 performance states 42 processor power states 42 sleeping states 41 terms AML 652
ASL notation 532 thermal management overview 61 threshold settings, dynamically changing 409 thermal states, definition 37 Thermal Zone data type, ASL 559, 563 thermal zones examples 434, 436 mobile PC example 61 multiple 63 multiple-speed fan example 435 object notification values 177 object requirements 433 ThermalZone (Declare Thermal Zone) 641 thirty-two bit fixed location memory range resource descriptor format 259 thirty-two bit memory range resource descriptor format 257 throttling 308 THT_EN 93 timers power management (PM) 70 TMR_EN 90 TMR_STS 88 TMR_VAL 92 TMR- field 79 ToBCD (Convert Integer to BCD) 642 ToBuffer (Convert Data to Buffer) 642 ToDecimalString (Convert Data to Decimal String) 642 ToHexString (Convert Data to Hexadecimal String) 643 ToInteger (Convert Data to Integer) 643 top of memory 493 ToString (Convert Buffer To String) 643 transactions, SMBus data buffers 468 transitioning crashed systems 80 device power states 670 Legacy mode to ACPI 86 transparent switching, device power states 41 Trigger Mode flags 138 trip points, thermal 411 twenty-four bit memory range resource descriptor format 256 Type 2 Opcodes, AML encoding 658 Unicode (String To Unicode Conversion Macro) 645 Uninitialzed data type, ASL 559, 563 Unload (Unload Definition Block) 645 unnamed objects 160 unrelated device interference 71 USB, power management 671 UUID (Convert String to UUID Macro) 644 value-added hardware registers 94 VGA 697
virtual registers 167, 468 visible states global system 37 Wait (Wait for a Synchronization Event) 646 WAK_STS (Wake Status) 84, 89 waking
audio devices 674 COM ports 675 devices 673 display devices 682 input devices 685 modem devices 687 modem example 52, 54 network devices 689 OS operations 50 PC Card controllers 691 storage devices 693 WBINVD 311, 489 web sites PCMCIA 671 SMBus specification 463 While (Conditional Loop) 646 WORD resource descriptor format 265 Working state definition 38 properties 38 workstations 124 Write Embedded Controller (WR_EC) 447 write-only bits control 66 definition 71 XOr (Integer Bitwise Xor) 651 XSDT table fields 113 Zero (Constant Zero Object) 651 Zero, One, Ones data type, ASL 559, 563 Default (Default Execution Path in Switch) 584 Thermal Constant 2 (_TC2) object 429 Timer (Get 64-Bit Timer Value) 641 VendorLong Long Vendor-Defined Descriptor macro) 645 _EJx 243 1 Some OS policies may require the OS to put the machine into a global system state for which the device can no longer wake the system. Such as when a system has very low battery power. 3 Notice that the G2/S5 “soft off” and the G3 “mechanical off” states are not sleeping states. The OS will disable the RTC_EN bit prior to entering the G2/S5 or G3 states regardless. 4 ACPI operating systems assume the use of the Smart Battery System Implementers Forum defined standard for batteries, called the “Smart Battery Specification” (SBS). ACPI provides a set of control methods for use by OEMs that use a proprietary “control method” battery interface. 5 On x86-based platforms, the OSPM uses the Hot Pluggable bit to determine whether it should shift into PAE mode to allow for insertion of hot-plug memory with physical addresses over 4 GB. 6 For the most part, since the name space is hierarchical, typically the bulk of a dynamic definition file will load into a different part of the hierarchy. The root of the name space and certain locations where interaction is being designed are the areas in which extra care must be taken. 7 Unless the operation being performed is explicitly prepared for failure in name resolution, this is considered an error and may cause the system to stop working. 8A Plug and Play (EISA) ID can be obtained by sending e-mail to pnpid@microsoft.com. 9 Plug and Play BIOS Specification Version 1.0A, May 5, 1994, Compaq Computer Corp., Intel Corp., Phoenix Technologies Ltd. 10 Or it is at least assumed to be in the D3 state by its device driver. For example, if the device doesn’t explicitly describe how it can stay in some state non-off state while the system is in a sleeping state, the operating software must assume that the device can lose its power and state. 11 Only buses that support hardware-defined enumeration methods are done automatically at run-time. This would include ACPI-enumerated devices. 12 A thermal warning leaves room for operating system tradeoffs to occur (to start the fan or to reduce performance), but a critical thermal alert does not occur. 13 Notice that these CPU states map into the G0 working state. The state of the CPU is undefined in the G3 sleeping state, the Cx states only apply to the G0 state. 14 Notice that the 1.0 SMBus protocol specification is ambiguous about the definition of the “slave address” written into the command field of the host controller. In this case, the slave address is actually the combination of the 7-bit slave address and the Write protocol bit. Therefore, bit 0 of the initiating device’s slave address is aligned to bit 1 of the host controller’s slave command register, bit 1 of the slave address is aligned to bit 2 of the controller’s slave command register, and so on. 15 OSPM uses the RTC wakeup feature to program in the time transition delay. Prior to sleeping, OSPM will program the RTC alarm to the closest (in time) wakeup event: either a transition to a lower power sleeping state, or a calendar event (to run some application). 16 Notice that there can be two fixed PM1x_CNT registers, each pointing to a different system I/O space region. Normally a register grouping only allows a bit or bit field to reside in a single register group instance (a or b); however, each platform can have two instances of the SLP_TYP (one for each grouping register: a and b). The \_Sx control method gives a package with two values: the first is the SLP_TYPa value and the second is the SLP_TYPb value. Directory: DOWNLOADS DOWNLOADS -> Northern England’s set-jetting locations DOWNLOADS -> Dynatest 3031 lwd light Weight Deflectometer DOWNLOADS -> Forth coming competitive exams DOWNLOADS -> Brush High School Morning Announcements Friday, September 05, 2014 all school DOWNLOADS -> Year 9 The Arts — Music DOWNLOADS -> Years 7 and 8 standard elaborations — Australian Curriculum: Music draft DOWNLOADS -> Chris Young sets 2016 “I’m Comin’ Over” Tour headlining dates DOWNLOADS -> Slavery and Abolition: the Plymouth Connection Introduction DOWNLOADS -> Summer Assignment Download 7.02 Mb. Share with your friends:
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